[wrap]
/***************************************************************************
-= Cave Hardware =-
driver by Luca Elia (l.elia@tin.it)
Main CPU : MC68000
Sound CPU : Z80 [Optional]
Sound Chips : YMZ280B or
OKIM6295 x (1|2) + YM2203 / YM2151 [Optional]
Other : 93C46 EEPROM
-----------------------------------------------------------------------------------------
Year + Game License PCB Tilemaps Sprites Other
-----------------------------------------------------------------------------------------
94 Mazinger Z Banpresto ? 038 9335EX706 013 9341E7009 Z80
94 PowerInstinct 2 Atlus ATG02? 038 9429WX709 013 Z80 NMK 112
95 P.I. Legends Atlus AT047G2-B 038 9429WX709 013 9341E7009 Z80 NMK 112
95 Metamoqester Banpresto BP947A 038 9437WX711 013 9346E7002 Z80
95 Sailor Moon Banpresto BP945A 038 9437WX711 013 9346E7002 Z80
95 Donpachi Atlus AT-C01DP-2 038 9429WX727 013 8647-01 NMK 112
96 Air Gallet Banpresto BP962A 038 9437WX711 013 9346E7002 Z80
96 Hotdog Storm Marble ? ? Z80
97 Dodonpachi Atlus ATC03D2 ?
98 Dangun Feveron Nihon System CV01 038 9808WX003 013 9807EX004
98 ESP Ra.De. Atlus ATC04 ?
98 Uo Poko Jaleco CV02 038 9749WX001 013 9749EX004
99 Guwange Atlus ATC05 ?
99 Gaia Crusaders Noise Factory ? 038 9838WX003 013 9918EX008
99 Koro Koro Quest Takumi TUG-01B 038 9838WX004 013 9838EX004
01 Thunder Heroes Primetek ? 038 9838WX003 013 9918EX008
-----------------------------------------------------------------------------------------
To Do:
- Sprite lag in some games (e.g. metmqstr). The sprites chip probably
generates interrupts (unknown_irq)
Stephh's notes (based on the games M68000 code and some tests) :
1) 'gaia'
- Difficulty Dip Switch also affects "Bonus Life" Dip Switch
2) 'theroes'
- This is a English/Chinese version, but from the manual, there might exist a English/Japanese one
- Difficulty Dip Switch also affects "Bonus Life" Dip Switch
- There are less degrees of difficulty in this version
- DSW2 bit 5 effect remains unknown :
* it is checked at address 0x008d16 at the begining of each sub-level
* it is checked at address 0x00c382 when you quickly push the joystick left or right twice
Any info is welcome !
Versions known to exist but not dumped:
Pretty Soldier Sailor Moon (95/03/21)
Dodonpachi Campaign Version
Reportedly only 3 ever made, one was given out as a prize to a high score contest winner. The other two
PCBs were shown running (and could be played) at a Cave fan show known as Cave Festival 2006. There are
videos of the game being played floating around the internet and on YouTube. AKA DDP-CV or DDP BLUE ROM
***************************************************************************/
#include "driver.h"
#include "machine/eeprom.h"
#include "machine/nmk112.h"
#include "cpu/z80/z80.h"
#include "cave.h"
#include "sound/2203intf.h"
#include "sound/2151intf.h"
#include "sound/okim6295.h"
#include "sound/ymz280b.h"
/***************************************************************************
Interrupt Handling Routines
***************************************************************************/
static int time_vblank_irq = 2000;
static UINT8 irq_level;
static UINT8 vblank_irq;
static UINT8 sound_irq;
static UINT8 unknown_irq;
static UINT8 agallet_vblank_irq;
/* Update the IRQ state based on all possible causes */
static void update_irq_state(running_machine *machine)
{
if (vblank_irq || sound_irq || unknown_irq)
cpu_set_input_line(machine->cpu[0], irq_level, ASSERT_LINE);
else
cpu_set_input_line(machine->cpu[0], irq_level, CLEAR_LINE);
}
static TIMER_CALLBACK( cave_vblank_start )
{
vblank_irq = 1;
update_irq_state(machine);
cave_get_sprite_info(machine);
agallet_vblank_irq = 1;
}
static TIMER_CALLBACK( cave_vblank_end )
{
if(cave_kludge == 3) /* mazinger metmqstr */
{
unknown_irq = 1;
update_irq_state(machine);
}
agallet_vblank_irq = 0;
}
/* Called once/frame to generate the VBLANK interrupt */
static INTERRUPT_GEN( cave_interrupt )
{
timer_set(ATTOTIME_IN_USEC(17376-time_vblank_irq), NULL, 0, cave_vblank_start);
timer_set(ATTOTIME_IN_USEC(17376-time_vblank_irq + 2000), NULL, 0, cave_vblank_end);
}
/* Called by the YMZ280B to set the IRQ state */
static void sound_irq_gen(running_machine *machine, int state)
{
sound_irq = (state != 0);
update_irq_state(machine);
}
/* Level 1 irq routines:
Game |first read | bit==0->routine + |
|offset: | read this offset |
ddonpach 4,0 0 -> vblank + 4 1 -> rte 2 -> like 0 read sound
dfeveron 0 0 -> vblank + 4 1 -> + 6 - read sound
uopoko 0 0 -> vblank + 4 1 -> + 6 - read sound
esprade 0 0 -> vblank + 4 1 -> rte 2 must be 0 read sound
guwange 0 0 -> vblank + 6,4 1 -> + 6,4 2 must be 0 read sound
mazinger 0 0 -> vblank + 4 rest -> scroll + 6
*/
/* Reads the cause of the interrupt and clears the state */
static READ16_HANDLER( cave_irq_cause_r )
{
int result = 0x0003;
if (vblank_irq) result ^= 0x01;
if (unknown_irq) result ^= 0x02;
if (offset == 4/2) vblank_irq = 0;
if (offset == 6/2) unknown_irq = 0;
update_irq_state(space->machine);
/*
sailormn and agallet wait for bit 2 of $b80001 to go 1 -> 0.
It must happen once per frame as agallet uses this to show
the copyright notice screen for ~8.5s
*/
if (offset == 0)
{
result &= ~4;
result |= (agallet_vblank_irq?0:4);
}
return result;
}
/***************************************************************************
Sound Handling Routines
***************************************************************************/
/* We need a FIFO buffer for sailormn, where the inter-CPUs
communication is *really* tight */
static struct
{
int len;
UINT8 data[32];
} soundbuf;
//static UINT8 sound_flag1, sound_flag2;
static READ8_HANDLER( soundflags_r )
{
// bit 2 is low: can read command (lo)
// bit 3 is low: can read command (hi)
// return (sound_flag1 ? 0 : 4) |
// (sound_flag2 ? 0 : 8) ;
return 0;
}
static READ16_HANDLER( soundflags_ack_r )
{
// bit 0 is low: can write command
// bit 1 is low: can read answer
// return ((sound_flag1 | sound_flag2) ? 1 : 0) |
// ((soundbuf.len>0 ) ? 0 : 2) ;
return ((soundbuf.len>0 ) ? 0 : 2) ;
}
/* Main CPU: write a 16 bit sound latch and generate a NMI on the sound CPU */
static WRITE16_HANDLER( sound_cmd_w )
{
// sound_flag1 = 1;
// sound_flag2 = 1;
soundlatch_word_w(space,offset,data,mem_mask);
cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50)); // Allow the other cpu to reply
}
/* Sound CPU: read the low 8 bits of the 16 bit sound latch */
static READ8_HANDLER( soundlatch_lo_r )
{
// sound_flag1 = 0;
return soundlatch_word_r(space,offset,0x00ff) & 0xff;
}
/* Sound CPU: read the high 8 bits of the 16 bit sound latch */
static READ8_HANDLER( soundlatch_hi_r )
{
// sound_flag2 = 0;
return soundlatch_word_r(space,offset,0xff00) >> 8;
}
/* Main CPU: read the latch written by the sound CPU (acknowledge) */
static READ16_HANDLER( soundlatch_ack_r )
{
if (soundbuf.len>0)
{
UINT8 data = soundbuf.data[0];
memmove(soundbuf.data,soundbuf.data+1,(32-1)*sizeof(soundbuf.data[0]));
soundbuf.len--;
return data;
}
else
{ logerror("CPU #1 - PC %04X: Sound Buffer 2 Underflow Error\n",cpu_get_pc(space->cpu));
return 0xff; }
}
/* Sound CPU: write latch for the main CPU (acknowledge) */
static WRITE8_HANDLER( soundlatch_ack_w )
{
soundbuf.data[soundbuf.len] = data;
if (soundbuf.len<32)
soundbuf.len++;
else
logerror("CPU #1 - PC %04X: Sound Buffer 2 Overflow Error\n",cpu_get_pc(space->cpu));
}
/* Handles writes to the YMZ280B */
static WRITE16_HANDLER( cave_sound_w )
{
if (ACCESSING_BITS_0_7)
{
if (offset) ymz280b_data_0_w (space, offset, data & 0xff);
else ymz280b_register_0_w (space, offset, data & 0xff);
}
}
/* Handles reads from the YMZ280B */
static READ16_HANDLER( cave_sound_r )
{
return ymz280b_status_0_r(space,offset);
}
/***************************************************************************
EEPROM
***************************************************************************/
static const UINT8 cave_default_eeprom_type1[16] = {0x00,0x0C,0x11,0x0D,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x11,0x11,0xFF,0xFF,0xFF,0xFF}; /* DFeveron, Guwange */
static const UINT8 cave_default_eeprom_type1feversos[18] = {0x00,0x0C,0x16,0x27,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x11,0x11,0xFF,0xFF,0xFF,0xFF,0x05,0x19}; /* Fever SOS (code checks for the 0x0519 or it won't boot) */
static const UINT8 cave_default_eeprom_type2[16] = {0x00,0x0C,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; /* Esprade, DonPachi, DDonPachi */
static const UINT8 cave_default_eeprom_type3[16] = {0x00,0x03,0x08,0x00,0xFF,0xFF,0xFF,0xFF,0x08,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF}; /* UoPoko */
static const UINT8 cave_default_eeprom_type4[16] = {0xF3,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}; /* Hotdog Storm */
static const UINT8 cave_default_eeprom_type5[16] = {0xED,0xFF,0x00,0x00,0x12,0x31,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; /* Mazinger Z (6th byte is country code) */
static const UINT8 cave_default_eeprom_type6[18] = {0xa5,0x00,0xa5,0x00,0xa5,0x00,0xa5,0x00,0xa5,0x01,0xa5,0x01,0xa5,0x04,0xa5,0x01,0xa5,0x02}; /* Sailor Moon (last byte is country code) */
// Air Gallet. Byte 1f is the country code (0==JAPAN,U.S.A,EUROPE,HONGKONG,TAIWAN,KOREA)
static const UINT8 cave_default_eeprom_type7[48] = {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,
0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff};
static const UINT8 *cave_default_eeprom;
static int cave_default_eeprom_length;
static int cave_region_byte;
static WRITE16_HANDLER( cave_eeprom_msb_w )
{
if (data & ~0xfe00)
logerror("CPU #0 PC: %06X - Unknown EEPROM bit written %04X\n",cpu_get_pc(space->cpu),data);
if ( ACCESSING_BITS_8_15 ) // even address
{
coin_lockout_w(1,~data & 0x8000);
coin_lockout_w(0,~data & 0x4000);
coin_counter_w(1, data & 0x2000);
coin_counter_w(0, data & 0x1000);
// latch the bit
eeprom_write_bit(data & 0x0800);
// reset line asserted: reset.
eeprom_set_cs_line((data & 0x0200) ? CLEAR_LINE : ASSERT_LINE );
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x0400) ? ASSERT_LINE : CLEAR_LINE );
}
}
static WRITE16_HANDLER( sailormn_eeprom_msb_w )
{
sailormn_tilebank_w ( data & 0x0100 );
cave_eeprom_msb_w(space,offset,data & ~0x0100,mem_mask);
}
static WRITE16_HANDLER( hotdogst_eeprom_msb_w )
{
if ( ACCESSING_BITS_8_15 ) // even address
{
// latch the bit
eeprom_write_bit(data & 0x0800);
// reset line asserted: reset.
eeprom_set_cs_line((data & 0x0200) ? CLEAR_LINE : ASSERT_LINE );
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x0400) ? CLEAR_LINE: ASSERT_LINE );
}
}
static WRITE16_HANDLER( cave_eeprom_lsb_w )
{
if (data & ~0x00ef)
logerror("CPU #0 PC: %06X - Unknown EEPROM bit written %04X\n",cpu_get_pc(space->cpu),data);
if ( ACCESSING_BITS_0_7 ) // odd address
{
coin_lockout_w(1,~data & 0x0008);
coin_lockout_w(0,~data & 0x0004);
coin_counter_w(1, data & 0x0002);
coin_counter_w(0, data & 0x0001);
// latch the bit
eeprom_write_bit(data & 0x80);
// reset line asserted: reset.
eeprom_set_cs_line((data & 0x20) ? CLEAR_LINE : ASSERT_LINE );
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE );
}
}
/* - No eeprom or lockouts */
static WRITE16_HANDLER( gaia_coin_lsb_w )
{
if ( ACCESSING_BITS_0_7 ) // odd address
{
coin_counter_w(1, data & 0x0002);
coin_counter_w(0, data & 0x0001);
}
}
/* - No coin lockouts
- Writing 0xcf00 shouldn't send a 1 bit to the eeprom */
static WRITE16_HANDLER( metmqstr_eeprom_msb_w )
{
if (data & ~0xff00)
logerror("CPU #0 PC: %06X - Unknown EEPROM bit written %04X\n",cpu_get_pc(space->cpu),data);
if ( ACCESSING_BITS_8_15 ) // even address
{
coin_counter_w(1, data & 0x2000);
coin_counter_w(0, data & 0x1000);
if (~data & 0x0100)
{
// latch the bit
eeprom_write_bit(data & 0x0800);
// reset line asserted: reset.
eeprom_set_cs_line((data & 0x0200) ? CLEAR_LINE : ASSERT_LINE );
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x0400) ? ASSERT_LINE : CLEAR_LINE );
}
}
}
static NVRAM_HANDLER( cave )
{
if (read_or_write)
eeprom_save(file);
else
{
eeprom_init(&eeprom_interface_93C46);
if (file) eeprom_load(file);
else
{
if (cave_default_eeprom) /* Set the EEPROM to Factory Defaults */
eeprom_set_data(cave_default_eeprom,cave_default_eeprom_length);
}
}
}
static const eeprom_interface eeprom_interface_93C46_8bit =
{
7, // address bits 7
8, // data bits 8
"*110", // read 1 10 aaaaaa
"*101", // write 1 01 aaaaaa dddddddddddddddd
"*111", // erase 1 11 aaaaaa
"*10000xxxx", // lock 1 00 00xxxx
"*10011xxxx", // unlock 1 00 11xxxx
1,
// "*10001xxxx" // write all 1 00 01xxxx dddddddddddddddd
// "*10010xxxx" // erase all 1 00 10xxxx
};
static NVRAM_HANDLER( korokoro )
{
if (read_or_write)
eeprom_save(file);
else
{
eeprom_init(&eeprom_interface_93C46_8bit);
if (file) eeprom_load(file);
else
{
if (cave_default_eeprom) /* Set the EEPROM to Factory Defaults */
eeprom_set_data(cave_default_eeprom,cave_default_eeprom_length);
}
}
}
/***************************************************************************
Memory Maps - Main CPU
***************************************************************************/
/* Lines starting with an empty comment in the following MemoryReadAddress
arrays are there for debug (e.g. the game does not read from those ranges
AFAIK) */
/***************************************************************************
Dangun Feveron
***************************************************************************/
static ADDRESS_MAP_START( dfeveron_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x300002, 0x300003) AM_READ(cave_sound_r ) // YMZ280
/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM ) // Layer 1
/**/AM_RANGE(0x708000, 0x708fff) AM_READ(SMH_RAM ) // Palette
/**/AM_RANGE(0x710000, 0x710fff) AM_READ(SMH_RAM ) // ?
AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r ) // IRQ Cause
/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM ) // Layer 1 Control
AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( dfeveron_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x300003) AM_WRITE(cave_sound_w ) // YMZ280
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x708000, 0x708fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0x710c00, 0x710fff) AM_WRITE(SMH_RAM ) // ?
AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xc00000, 0xc00001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
ADDRESS_MAP_END
/***************************************************************************
Dodonpachi
***************************************************************************/
static ADDRESS_MAP_START( ddonpach_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x300002, 0x300003) AM_READ(cave_sound_r ) // YMZ280
/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM ) // Layer 1
/**/AM_RANGE(0x700000, 0x70ffff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r ) // IRQ Cause
/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 2 Control
/**/AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( ddonpach_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x300003) AM_WRITE(cave_sound_w ) // YMZ280
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2 )
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x700000, 0x70ffff) AM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
ADDRESS_MAP_END
/***************************************************************************
Donpachi
***************************************************************************/
static READ16_HANDLER( donpachi_videoregs_r )
{
switch( offset )
{
case 0:
case 1:
case 2:
case 3: return cave_irq_cause_r(space,offset,0xffff);
default: return 0x0000;
}
}
#if 0
WRITE16_HANDLER( donpachi_videoregs_w )
{
COMBINE_DATA(&cave_videoregs[offset]);
switch( offset )
{
// case 0x78/2: watchdog_reset16_w(0,0); break;
}
}
#endif
static ADDRESS_MAP_START( donpachi_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x300000, 0x307fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Sprites
AM_RANGE(0x508000, 0x50ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0x600000, 0x600005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0x700000, 0x700005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0x800000, 0x800005) AM_READ(SMH_RAM ) // Layer 2 Control
AM_RANGE(0x900000, 0x90007f) AM_READ(donpachi_videoregs_r ) // Video Regs
/**/AM_RANGE(0xa08000, 0xa08fff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0xb00000, 0xb00001) AM_READ(okim6295_status_0_lsb_r ) // M6295
AM_RANGE(0xb00010, 0xb00011) AM_READ(okim6295_status_1_lsb_r ) //
AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( donpachi_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x200000, 0x207fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x300000, 0x307fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x400000, 0x407fff) AM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x500000, 0x507fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprites
AM_RANGE(0x508000, 0x50ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2 )
AM_RANGE(0x600000, 0x600005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0x700000, 0x700005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0x800000, 0x800005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0x900000, 0x90007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0xa08000, 0xa08fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xb00000, 0xb00003) AM_WRITE(okim6295_data_0_lsb_w ) // M6295
AM_RANGE(0xb00010, 0xb00013) AM_WRITE(okim6295_data_1_lsb_w ) //
AM_RANGE(0xb00020, 0xb0002f) AM_WRITE(NMK112_okibank_lsb_w ) //
AM_RANGE(0xd00000, 0xd00001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
ADDRESS_MAP_END
/***************************************************************************
Esprade
***************************************************************************/
static ADDRESS_MAP_START( esprade_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x300002, 0x300003) AM_READ(cave_sound_r ) // YMZ280
/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM ) // Layer 1
/**/AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r ) // IRQ Cause
/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 2 Control
/**/AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( esprade_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x300003) AM_WRITE(cave_sound_w ) // YMZ280
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2) // Sprites?
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x700000, 0x707fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
ADDRESS_MAP_END
/***************************************************************************
Gaia Crusaders
***************************************************************************/
static ADDRESS_MAP_START( gaia_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x300002, 0x300003) AM_READ(cave_sound_r ) // YMZ280
AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Sprite bank 1
AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM ) // Sprite bank 2
AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x508000, 0x50ffff) AM_READ(SMH_RAM ) // More Layer 0, Tested but not used?
AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x608000, 0x60ffff) AM_READ(SMH_RAM ) // More Layer 1, Tested but not used?
AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x708000, 0x70ffff) AM_READ(SMH_RAM ) // More Layer 2, Tested but not used?
AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r ) // IRQ Cause
/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 2 Control
AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1" ) // Inputs
AM_RANGE(0xd00014, 0xd00015) AM_READ_PORT("DSW" ) // Dips
ADDRESS_MAP_END
static ADDRESS_MAP_START( gaia_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x300003) AM_WRITE(cave_sound_w ) // YMZ280
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprite bank 1
AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2 ) // Sprite bank 2
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x508000, 0x50ffff) AM_WRITE(SMH_RAM ) // More Layer 0, Tested but not used?
AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x608000, 0x60ffff) AM_WRITE(SMH_RAM ) // More Layer 1, Tested but not used?
AM_RANGE(0x700000, 0x707fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x708000, 0x70ffff) AM_WRITE(SMH_RAM ) // More Layer 2, Tested but not used?
AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xd00010, 0xd00011) AM_WRITE(gaia_coin_lsb_w ) // Coin counter only
AM_RANGE(0xd00014, 0xd00015) AM_WRITE(watchdog_reset16_w ) // Watchdog?
ADDRESS_MAP_END
/***************************************************************************
Guwange
***************************************************************************/
static ADDRESS_MAP_START( guwange_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r ) // IRQ Cause
/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM ) // Layer 1
/**/AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x800002, 0x800003) AM_READ(cave_sound_r ) // YMZ280
/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 2 Control
/**/AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1" ) // Inputs + EEPROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( guwange_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x30007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2 )
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x700000, 0x707fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x800000, 0x800003) AM_WRITE(cave_sound_w ) // YMZ280
AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xd00010, 0xd00011) AM_WRITE(cave_eeprom_lsb_w ) // EEPROM
// AM_RANGE(0xd00012, 0xd00013) AM_WRITE(SMH_NOP ) // ?
// AM_RANGE(0xd00014, 0xd00015) AM_WRITE(SMH_NOP ) // ? $800068 in dfeveron ? probably Watchdog
ADDRESS_MAP_END
/***************************************************************************
Hotdog Storm
***************************************************************************/
static ADDRESS_MAP_START( hotdogst_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM ) // RAM
/**/AM_RANGE(0x408000, 0x408fff) AM_READ(SMH_RAM ) // Palette
/**/AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM ) // Layer 0
/**/AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM ) // Layer 1
/**/AM_RANGE(0x980000, 0x987fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r ) // IRQ Cause
// AM_RANGE(0xa8006e, 0xa8006f) AM_READ(soundlatch_ack_r ) // From Sound CPU
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xc00000, 0xc00005) AM_READ(SMH_RAM ) // Layer 2 Control
AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
/**/AM_RANGE(0xf00000, 0xf07fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0xf08000, 0xf0ffff) AM_READ(SMH_RAM ) // Sprites?
ADDRESS_MAP_END
static ADDRESS_MAP_START( hotdogst_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x408000, 0x408fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x980000, 0x987fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w ) // To Sound CPU
AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xb80000, 0xb80005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xc00000, 0xc00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xd00000, 0xd00001) AM_WRITE(hotdogst_eeprom_msb_w ) // EEPROM
AM_RANGE(0xd00002, 0xd00003) AM_WRITE(SMH_NOP ) // ???
AM_RANGE(0xf00000, 0xf07fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0xf08000, 0xf0ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
ADDRESS_MAP_END
/***************************************************************************
Koro Koro Quest
***************************************************************************/
static UINT16 leds[2];
static void show_leds(void)
{
#ifdef MAME_DEBUG
// popmessage("led %04X eep %02X",leds[0],(leds[1] >> 8) & ~0x70);
#endif
}
static WRITE16_HANDLER( korokoro_leds_w )
{
COMBINE_DATA( &leds[0] );
set_led_status(0, data & 0x8000);
set_led_status(1, data & 0x4000);
set_led_status(2, data & 0x1000); // square button
set_led_status(3, data & 0x0800); // round button
// coin_lockout_w(1,~data & 0x0200); // coin lockouts?
// coin_lockout_w(0,~data & 0x0100);
// coin_counter_w(2, data & 0x0080);
// coin_counter_w(1, data & 0x0020);
coin_counter_w(0, data & 0x0010);
set_led_status(5, data & 0x0008);
set_led_status(6, data & 0x0004);
set_led_status(7, data & 0x0002);
set_led_status(8, data & 0x0001);
show_leds();
}
static int hopper;
static WRITE16_HANDLER( korokoro_eeprom_msb_w )
{
if (data & ~0x7000)
{
logerror("CPU #0 PC: %06X - Unknown EEPROM bit written %04X\n",cpu_get_pc(space->cpu),data);
COMBINE_DATA( &leds[1] );
show_leds();
}
if ( ACCESSING_BITS_8_15 ) // even address
{
hopper = data & 0x0100; // ???
// latch the bit
eeprom_write_bit(data & 0x4000);
// reset line asserted: reset.
eeprom_set_cs_line((data & 0x1000) ? CLEAR_LINE : ASSERT_LINE );
// clock line asserted: write latch or select next bit to read
eeprom_set_clock_line((data & 0x2000) ? ASSERT_LINE : CLEAR_LINE );
}
}
static CUSTOM_INPUT( korokoro_hopper_r )
{
return hopper ? 1 : 0;
}
static ADDRESS_MAP_START( korokoro_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ( SMH_ROM ) // ROM
// AM_RANGE(0x100000, 0x107fff) AM_READ( SMH_RAM ) // Layer 0
// AM_RANGE(0x140000, 0x140005) AM_READ( SMH_RAM ) // Layer 0 Control
// AM_RANGE(0x180000, 0x187fff) AM_READ( SMH_RAM ) // Sprites
AM_RANGE(0x1c0000, 0x1c0007) AM_READ( cave_irq_cause_r ) // IRQ Cause
// AM_RANGE(0x200000, 0x207fff) AM_READ( SMH_RAM ) // Palette
// AM_RANGE(0x240000, 0x240003) AM_READ( cave_sound_r ) // YMZ280
AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0" ) // Inputs + ???
AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
AM_RANGE(0x300000, 0x30ffff) AM_READ( SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( korokoro_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE( SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x107fff) AM_WRITE( cave_vram_0_w ) AM_BASE( &cave_vram_0 ) // Layer 0
AM_RANGE(0x140000, 0x140005) AM_WRITE( SMH_RAM ) AM_BASE( &cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0x180000, 0x187fff) AM_WRITE( SMH_RAM ) AM_BASE( &spriteram16 ) AM_SIZE(&spriteram_size ) // Sprites
AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE( SMH_RAM ) AM_BASE( &cave_videoregs ) // Video Regs
AM_RANGE(0x200000, 0x207fff) AM_WRITE( SMH_RAM ) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0x240000, 0x240003) AM_WRITE( cave_sound_w ) // YMZ280
AM_RANGE(0x280008, 0x280009) AM_WRITE( korokoro_leds_w )
AM_RANGE(0x28000a, 0x28000b) AM_WRITE( korokoro_eeprom_msb_w ) // EEPROM
AM_RANGE(0x28000c, 0x28000d) AM_WRITE( SMH_NOP ) // 0 (watchdog?)
AM_RANGE(0x300000, 0x30ffff) AM_WRITE( SMH_RAM ) // RAM
ADDRESS_MAP_END
/***************************************************************************
Mazinger Z
***************************************************************************/
static ADDRESS_MAP_START( mazinger_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
/**/AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0x208000, 0x20ffff) AM_READ(SMH_RAM ) // Sprites?
AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r ) // IRQ Cause
AM_RANGE(0x30006e, 0x30006f) AM_READ(soundlatch_ack_r ) // From Sound CPU
/**/AM_RANGE(0x404000, 0x407fff) AM_READ(SMH_RAM ) // Layer 1
/**/AM_RANGE(0x504000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
/**/AM_RANGE(0x600000, 0x600005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0x700000, 0x700005) AM_READ(SMH_RAM ) // Layer 0 Control
AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
/**/AM_RANGE(0xc08000, 0xc0ffff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0xd00000, 0xd7ffff) AM_READ(SMH_BANK1 ) // ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mazinger_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x200000, 0x207fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x208000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
AM_RANGE(0x300068, 0x300069) AM_WRITE(watchdog_reset16_w ) // Watchdog
AM_RANGE(0x30006e, 0x30006f) AM_WRITE(sound_cmd_w ) // To Sound CPU
AM_RANGE(0x300000, 0x30007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x400000, 0x407fff) AM_WRITE(cave_vram_1_8x8_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_8x8_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x600000, 0x600005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0x700000, 0x700005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
AM_RANGE(0xc08000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xd00000, 0xd7ffff) AM_WRITE(SMH_ROM ) // ROM
ADDRESS_MAP_END
/***************************************************************************
Metamoqester
***************************************************************************/
static ADDRESS_MAP_START( metmqstr_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x17ffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x200000, 0x27ffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x408000, 0x408fff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x600000, 0x600001) AM_READ(watchdog_reset16_r ) // Watchdog?
AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x888000, 0x88ffff) AM_READ(SMH_RAM ) //
AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x908000, 0x90ffff) AM_READ(SMH_RAM ) //
AM_RANGE(0x980000, 0x987fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x988000, 0x98ffff) AM_READ(SMH_RAM ) //
AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r ) // IRQ Cause
AM_RANGE(0xa8006c, 0xa8006d) AM_READ(soundflags_ack_r ) // Communication
AM_RANGE(0xa8006e, 0xa8006f) AM_READ(soundlatch_ack_r ) // From Sound CPU
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xc00000, 0xc00005) AM_READ(SMH_RAM ) // Layer 2 Control
AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
AM_RANGE(0xf00000, 0xf07fff) AM_READ(SMH_RAM ) // Sprites
AM_RANGE(0xf08000, 0xf0ffff) AM_READ(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( metmqstr_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x200000, 0x27ffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x408000, 0x408fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x888000, 0x88ffff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x908000, 0x90ffff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0x980000, 0x987fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x988000, 0x98ffff) AM_WRITE(SMH_RAM ) //
AM_RANGE(0xa80068, 0xa80069) AM_WRITE(watchdog_reset16_w ) // Watchdog?
AM_RANGE(0xa8006c, 0xa8006d) AM_WRITE(SMH_NOP ) // ?
AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w ) // To Sound CPU
AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xb80000, 0xb80005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xc00000, 0xc00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xd00000, 0xd00001) AM_WRITE(metmqstr_eeprom_msb_w ) // EEPROM
AM_RANGE(0xf00000, 0xf07fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0xf08000, 0xf0ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
ADDRESS_MAP_END
/***************************************************************************
Power Instinct 2
***************************************************************************/
static READ16_HANDLER( pwrinst2_eeprom_r )
{
return ~8 + ((eeprom_read_bit() & 1) ? 8 : 0);
}
INLINE void vctrl_w(UINT16 *VCTRL, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
{
if ( offset == 4/2 )
{
switch( data & 0x000f )
{
case 1: data = (data & ~0x000f) | 0; break;
case 2: data = (data & ~0x000f) | 1; break;
case 4: data = (data & ~0x000f) | 2; break;
default:
case 8: data = (data & ~0x000f) | 3; break;
}
}
COMBINE_DATA(&VCTRL[offset]);
}
static WRITE16_HANDLER( pwrinst2_vctrl_0_w ) { vctrl_w(cave_vctrl_0, offset, data, mem_mask); }
static WRITE16_HANDLER( pwrinst2_vctrl_1_w ) { vctrl_w(cave_vctrl_1, offset, data, mem_mask); }
static WRITE16_HANDLER( pwrinst2_vctrl_2_w ) { vctrl_w(cave_vctrl_2, offset, data, mem_mask); }
static WRITE16_HANDLER( pwrinst2_vctrl_3_w ) { vctrl_w(cave_vctrl_3, offset, data, mem_mask); }
static ADDRESS_MAP_START( pwrinst2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1" ) //
AM_RANGE(0x600000, 0x6fffff) AM_READ(SMH_ROM) AM_REGION("user1", 0) // extra data ROM space
AM_RANGE(0x800000, 0x807fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x980000, 0x987fff) AM_READ(SMH_RAM ) // Layer 3
AM_RANGE(0xa00000, 0xa07fff) AM_READ(SMH_RAM ) // Sprites
AM_RANGE(0xa08000, 0xa0ffff) AM_READ(SMH_RAM ) // Sprites?
AM_RANGE(0xa10000, 0xa1ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 2 Control
/**/AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xc00000, 0xc00005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xc80000, 0xc80005) AM_READ(SMH_RAM ) // Layer 3 Control
AM_RANGE(0xa80000, 0xa8007f) AM_READ(donpachi_videoregs_r ) // Video Regs
AM_RANGE(0xd80000, 0xd80001) AM_READ(soundlatch_ack_r ) // ? From Sound CPU
AM_RANGE(0xe80000, 0xe80001) AM_READ(pwrinst2_eeprom_r ) // EEPROM
AM_RANGE(0xf00000, 0xf04fff) AM_READ(SMH_RAM ) // Palette
ADDRESS_MAP_END
static ADDRESS_MAP_START( pwrinst2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x700000, 0x700001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
AM_RANGE(0x800000, 0x807fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x980000, 0x987fff) AM_WRITE(cave_vram_3_8x8_w) AM_BASE(&cave_vram_3) // Layer 3
AM_RANGE(0xa00000, 0xa07fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size ) // Sprites
AM_RANGE(0xa08000, 0xa0ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
AM_RANGE(0xa10000, 0xa1ffff) AM_WRITE(SMH_RAM ) // Sprites?
AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(pwrinst2_vctrl_2_w) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xb80000, 0xb80005) AM_WRITE(pwrinst2_vctrl_0_w) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xc00000, 0xc00005) AM_WRITE(pwrinst2_vctrl_1_w) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xc80000, 0xc80005) AM_WRITE(pwrinst2_vctrl_3_w) AM_BASE(&cave_vctrl_3 ) // Layer 3 Control
AM_RANGE(0xe00000, 0xe00001) AM_WRITE(sound_cmd_w ) // To Sound CPU
AM_RANGE(0xf00000, 0xf04fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
ADDRESS_MAP_END
/***************************************************************************
Sailor Moon
***************************************************************************/
static READ16_HANDLER( sailormn_input0_r )
{
// watchdog_reset16_r(0,0); // written too rarely for mame.
return input_port_read(space->machine, "IN0");
}
static READ16_HANDLER( agallet_irq_cause_r )
{
UINT16 irq_cause = cave_irq_cause_r(space,offset,mem_mask);
if (offset == 0)
{
// Speed hack for agallet
if ((cpu_get_pc(space->cpu) == 0xcdca) && (irq_cause & 4))
cpu_spinuntil_int(space->cpu);
}
return irq_cause;
}
static ADDRESS_MAP_START( sailormn_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x110000, 0x110001) AM_READ(SMH_RAM ) // (agallet)
AM_RANGE(0x200000, 0x3fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // (agallet)
AM_RANGE(0x408000, 0x40bfff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x40c000, 0x40ffff) AM_READ(SMH_RAM ) // (agallet)
AM_RANGE(0x410000, 0x410001) AM_READ(SMH_RAM ) // (agallet)
AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Sprites
AM_RANGE(0x508000, 0x50ffff) AM_READ(SMH_RAM ) // Sprites?
AM_RANGE(0x510000, 0x510001) AM_READ(SMH_RAM ) // (agallet)
AM_RANGE(0x600000, 0x600001) AM_READ(sailormn_input0_r ) // Inputs + Watchdog!
AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
AM_RANGE(0x800000, 0x887fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM ) // Layer 1
AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM ) // Layer 2
AM_RANGE(0x908000, 0x908001) AM_READ(SMH_RAM ) // (agallet)
/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0xa80000, 0xa80005) AM_READ(SMH_RAM ) // Layer 1 Control
/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM ) // Layer 2 Control
AM_RANGE(0xb80000, 0xb80007) AM_READ(cave_irq_cause_r ) // IRQ Cause (bit 2 tested!)
AM_RANGE(0xb8006c, 0xb8006d) AM_READ(soundflags_ack_r ) // Communication
AM_RANGE(0xb8006e, 0xb8006f) AM_READ(soundlatch_ack_r ) // From Sound CPU
ADDRESS_MAP_END
static ADDRESS_MAP_START( sailormn_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x110000, 0x110001) AM_WRITE(SMH_RAM ) // (agallet)
AM_RANGE(0x200000, 0x3fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM ) // (agallet)
AM_RANGE(0x408000, 0x40bfff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0x40c000, 0x40ffff) AM_WRITE(SMH_RAM ) // (agallet)
AM_RANGE(0x410000, 0x410001) AM_WRITE(SMH_RAM ) // (agallet)
AM_RANGE(0x500000, 0x507fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x508000, 0x50ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
AM_RANGE(0x510000, 0x510001) AM_WRITE(SMH_RAM ) // (agallet)
AM_RANGE(0x700000, 0x700001) AM_WRITE(sailormn_eeprom_msb_w ) // EEPROM
AM_RANGE(0x800000, 0x807fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1 ) // Layer 1
AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2 ) // Layer 2
AM_RANGE(0x908000, 0x908001) AM_WRITE(SMH_RAM ) // (agallet)
AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0xa80000, 0xa80005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1 ) // Layer 1 Control
AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2 ) // Layer 2 Control
AM_RANGE(0xb8006e, 0xb8006f) AM_WRITE(sound_cmd_w ) // To Sound CPU
AM_RANGE(0xb80000, 0xb8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
ADDRESS_MAP_END
/***************************************************************************
Uo Poko
***************************************************************************/
static ADDRESS_MAP_START( uopoko_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0x300002, 0x300003) AM_READ(cave_sound_r ) // YMZ280
/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM ) // Sprites
/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM ) // Sprites?
/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM ) // Layer 0
AM_RANGE(0x600000, 0x600007) AM_READ(cave_irq_cause_r ) // IRQ Cause
/**/AM_RANGE(0x700000, 0x700005) AM_READ(SMH_RAM ) // Layer 0 Control
/**/AM_RANGE(0x800000, 0x80ffff) AM_READ(SMH_RAM ) // Palette
AM_RANGE(0x900000, 0x900001) AM_READ_PORT("IN0" ) // Inputs
AM_RANGE(0x900002, 0x900003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( uopoko_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0x300000, 0x300003) AM_WRITE(cave_sound_w ) // YMZ280
AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites
AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2 )
AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0 ) // Layer 0
AM_RANGE(0x600000, 0x60007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs ) // Video Regs
AM_RANGE(0x700000, 0x700005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0 ) // Layer 0 Control
AM_RANGE(0x800000, 0x80ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size) // Palette
AM_RANGE(0xa00000, 0xa00001) AM_WRITE(cave_eeprom_msb_w ) // EEPROM
ADDRESS_MAP_END
/***************************************************************************
Memory Maps - Sound CPU (Optional)
***************************************************************************/
/***************************************************************************
Hotdog Storm
***************************************************************************/
static WRITE8_HANDLER( hotdogst_rombank_w )
{
UINT8 *RAM = memory_region(space->machine, "audio");
int bank = data & 0x0f;
if ( data & ~0x0f ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 1) bank+=2;
memory_set_bankptr(space->machine, 2, &RAM[ 0x4000 * bank ]);
}
static WRITE8_HANDLER( hotdogst_okibank_w )
{
UINT8 *RAM = memory_region(space->machine, "oki");
int bank1 = (data >> 0) & 0x3;
int bank2 = (data >> 4) & 0x3;
memcpy(RAM + 0x20000 * 0, RAM + 0x40000 + 0x20000 * bank1, 0x20000);
memcpy(RAM + 0x20000 * 1, RAM + 0x40000 + 0x20000 * bank2, 0x20000);
}
static ADDRESS_MAP_START( hotdogst_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK2 ) // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( hotdogst_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM ) // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( hotdogst_sound_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r ) // From Main CPU
AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r ) //
AM_RANGE(0x50, 0x50) AM_READ(ym2203_status_port_0_r ) // YM2203
AM_RANGE(0x51, 0x51) AM_READ(ym2203_read_port_0_r ) //
AM_RANGE(0x60, 0x60) AM_READ(okim6295_status_0_r ) // M6295
ADDRESS_MAP_END
static ADDRESS_MAP_START( hotdogst_sound_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(hotdogst_rombank_w ) // ROM bank
AM_RANGE(0x50, 0x50) AM_WRITE(ym2203_control_port_0_w ) // YM2203
AM_RANGE(0x51, 0x51) AM_WRITE(ym2203_write_port_0_w ) //
AM_RANGE(0x60, 0x60) AM_WRITE(okim6295_data_0_w ) // M6295
AM_RANGE(0x70, 0x70) AM_WRITE(hotdogst_okibank_w ) // Samples bank
ADDRESS_MAP_END
/***************************************************************************
Mazinger Z
***************************************************************************/
static WRITE8_HANDLER( mazinger_rombank_w )
{
UINT8 *RAM = memory_region(space->machine, "audio");
int bank = data & 0x07;
if ( data & ~0x07 ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 1) bank+=2;
memory_set_bankptr(space->machine, 2, &RAM[ 0x4000 * bank ]);
}
static ADDRESS_MAP_START( mazinger_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK2 ) // ROM (Banked)
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM ) // RAM
AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mazinger_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM ) // ROM (Banked)
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM ) // RAM
AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mazinger_sound_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r ) // From Main CPU
AM_RANGE(0x52, 0x52) AM_READ(ym2203_status_port_0_r ) // YM2203
ADDRESS_MAP_END
static ADDRESS_MAP_START( mazinger_sound_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(mazinger_rombank_w ) // ROM bank
AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w ) // To Main CPU
AM_RANGE(0x50, 0x50) AM_WRITE(ym2203_control_port_0_w ) // YM2203
AM_RANGE(0x51, 0x51) AM_WRITE(ym2203_write_port_0_w ) //
AM_RANGE(0x70, 0x70) AM_WRITE(okim6295_data_0_w ) // M6295
AM_RANGE(0x74, 0x74) AM_WRITE(hotdogst_okibank_w ) // Samples bank
ADDRESS_MAP_END
/***************************************************************************
Metamoqester
***************************************************************************/
static WRITE8_HANDLER( metmqstr_rombank_w )
{
UINT8 *ROM = memory_region(space->machine, "audio");
int bank = data & 0xf;
if ( bank != data ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank >= 2) bank += 2;
memory_set_bankptr(space->machine, 1, &ROM[ 0x4000 * bank ]);
}
static WRITE8_HANDLER( metmqstr_okibank0_w )
{
UINT8 *ROM = memory_region(space->machine, "oki1");
int bank1 = (data >> 0) & 0x7;
int bank2 = (data >> 4) & 0x7;
memcpy(ROM + 0x20000 * 0, ROM + 0x40000 + 0x20000 * bank1, 0x20000);
memcpy(ROM + 0x20000 * 1, ROM + 0x40000 + 0x20000 * bank2, 0x20000);
}
static WRITE8_HANDLER( metmqstr_okibank1_w )
{
UINT8 *ROM = memory_region(space->machine, "oki2");
int bank1 = (data >> 0) & 0x7;
int bank2 = (data >> 4) & 0x7;
memcpy(ROM + 0x20000 * 0, ROM + 0x40000 + 0x20000 * bank1, 0x20000);
memcpy(ROM + 0x20000 * 1, ROM + 0x40000 + 0x20000 * bank2, 0x20000);
}
static ADDRESS_MAP_START( metmqstr_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1 ) // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( metmqstr_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM ) // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( metmqstr_sound_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x20, 0x20) AM_READ(soundflags_r ) // Communication
AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r ) // From Main CPU
AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r ) //
AM_RANGE(0x51, 0x51) AM_READ(ym2151_status_port_0_r ) // YM2151
ADDRESS_MAP_END
static ADDRESS_MAP_START( metmqstr_sound_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(metmqstr_rombank_w ) // Rom Bank
AM_RANGE(0x50, 0x50) AM_WRITE(ym2151_register_port_0_w ) // YM2151
AM_RANGE(0x51, 0x51) AM_WRITE(ym2151_data_port_0_w ) //
AM_RANGE(0x60, 0x60) AM_WRITE(okim6295_data_0_w ) // M6295 #0
AM_RANGE(0x70, 0x70) AM_WRITE(metmqstr_okibank0_w ) // Samples Bank #0
AM_RANGE(0x80, 0x80) AM_WRITE(okim6295_data_1_w ) // M6295 #1
AM_RANGE(0x90, 0x90) AM_WRITE(metmqstr_okibank1_w ) // Samples Bank #1
ADDRESS_MAP_END
/***************************************************************************
Power Instinct 2
***************************************************************************/
static WRITE8_HANDLER( pwrinst2_rombank_w )
{
UINT8 *ROM = memory_region(space->machine, "audio");
int bank = data & 0x07;
if ( data & ~0x07 ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 2) bank+=1;
memory_set_bankptr(space->machine, 1, &ROM[ 0x4000 * bank ]);
}
static ADDRESS_MAP_START( pwrinst2_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1 ) // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( pwrinst2_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM ) // ROM (Banked)
AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM ) // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( pwrinst2_sound_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ(okim6295_status_0_r ) // M6295
AM_RANGE(0x08, 0x08) AM_READ(okim6295_status_1_r ) //
AM_RANGE(0x40, 0x40) AM_READ(ym2203_status_port_0_r ) // YM2203
AM_RANGE(0x41, 0x41) AM_READ(ym2203_read_port_0_r ) //
AM_RANGE(0x60, 0x60) AM_READ(soundlatch_hi_r ) // From Main CPU
AM_RANGE(0x70, 0x70) AM_READ(soundlatch_lo_r ) //
ADDRESS_MAP_END
static ADDRESS_MAP_START( pwrinst2_sound_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(okim6295_data_0_w ) // M6295
AM_RANGE(0x08, 0x08) AM_WRITE(okim6295_data_1_w ) //
AM_RANGE(0x10, 0x17) AM_WRITE(NMK112_okibank_w ) // Samples bank
AM_RANGE(0x40, 0x40) AM_WRITE(ym2203_control_port_0_w ) // YM2203
AM_RANGE(0x41, 0x41) AM_WRITE(ym2203_write_port_0_w ) //
AM_RANGE(0x50, 0x50) AM_WRITE(soundlatch_ack_w ) // To Main CPU
// AM_RANGE(0x51, 0x51) AM_WRITE(SMH_NOP ) // ?? volume
AM_RANGE(0x80, 0x80) AM_WRITE(pwrinst2_rombank_w ) // ROM bank
ADDRESS_MAP_END
/***************************************************************************
Sailor Moon
***************************************************************************/
static UINT8 *mirror_ram;
static READ8_HANDLER( mirror_ram_r )
{
return mirror_ram[offset];
}
static WRITE8_HANDLER( mirror_ram_w )
{
mirror_ram[offset] = data;
}
static WRITE8_HANDLER( sailormn_rombank_w )
{
UINT8 *RAM = memory_region(space->machine, "audio");
int bank = data & 0x1f;
if ( data & ~0x1f ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);
if (bank > 1) bank+=2;
memory_set_bankptr(space->machine, 1, &RAM[ 0x4000 * bank ]);
}
static WRITE8_HANDLER( sailormn_okibank0_w )
{
UINT8 *RAM = memory_region(space->machine, "oki1");
int bank1 = (data >> 0) & 0xf;
int bank2 = (data >> 4) & 0xf;
memcpy(RAM + 0x20000 * 0, RAM + 0x40000 + 0x20000 * bank1, 0x20000);
memcpy(RAM + 0x20000 * 1, RAM + 0x40000 + 0x20000 * bank2, 0x20000);
}
static WRITE8_HANDLER( sailormn_okibank1_w )
{
UINT8 *RAM = memory_region(space->machine, "oki2");
int bank1 = (data >> 0) & 0xf;
int bank2 = (data >> 4) & 0xf;
memcpy(RAM + 0x20000 * 0, RAM + 0x40000 + 0x20000 * bank1, 0x20000);
memcpy(RAM + 0x20000 * 1, RAM + 0x40000 + 0x20000 * bank2, 0x20000);
}
static ADDRESS_MAP_START( sailormn_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1 ) // ROM (Banked)
AM_RANGE(0xc000, 0xdfff) AM_READ(mirror_ram_r ) // RAM
AM_RANGE(0xe000, 0xffff) AM_READ(mirror_ram_r ) // Mirrored RAM (agallet)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sailormn_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM ) // ROM
AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM ) // ROM (Banked)
AM_RANGE(0xc000, 0xdfff) AM_WRITE(mirror_ram_w) AM_BASE(&mirror_ram) // RAM
AM_RANGE(0xe000, 0xffff) AM_WRITE(mirror_ram_w ) // Mirrored RAM (agallet)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sailormn_sound_readport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x20, 0x20) AM_READ(soundflags_r ) // Communication
AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r ) // From Main CPU
AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r ) //
AM_RANGE(0x51, 0x51) AM_READ(ym2151_status_port_0_r ) // YM2151
AM_RANGE(0x60, 0x60) AM_READ(okim6295_status_0_r ) // M6295 #0
AM_RANGE(0x80, 0x80) AM_READ(okim6295_status_1_r ) // M6295 #1
ADDRESS_MAP_END
static ADDRESS_MAP_START( sailormn_sound_writeport, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_WRITE(sailormn_rombank_w ) // Rom Bank
AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w ) // To Main CPU
AM_RANGE(0x50, 0x50) AM_WRITE(ym2151_register_port_0_w ) // YM2151
AM_RANGE(0x51, 0x51) AM_WRITE(ym2151_data_port_0_w ) //
AM_RANGE(0x60, 0x60) AM_WRITE(okim6295_data_0_w ) // M6295 #0
AM_RANGE(0x70, 0x70) AM_WRITE(sailormn_okibank0_w ) // Samples Bank #0
AM_RANGE(0x80, 0x80) AM_WRITE(okim6295_data_1_w ) // M6295 #1
AM_RANGE(0xc0, 0xc0) AM_WRITE(sailormn_okibank1_w ) // Samples Bank #1
ADDRESS_MAP_END
/***************************************************************************
Input Ports
***************************************************************************/
/*
dfeveron config menu:
101624.w -> 8,a6 preferences
101626.w -> c,a6 (1:coin<<4|credit) <<8 | (2:coin<<4|credit)
*/
/* Most games use this */
static INPUT_PORTS_START( cave )
PORT_START("IN0") // IN0 - Player 1
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(6)
PORT_SERVICE_NO_TOGGLE( 0x0200, IP_ACTIVE_LOW )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) // sw? exit service mode
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) // sw? enter & exit service mode
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN1") // IN1 - Player 2
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(6)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
/* Gaia Crusaders, no EEPROM. Has DIPS */
static INPUT_PORTS_START( gaia )
PORT_INCLUDE( cave )
PORT_MODIFY("IN0") // IN0 - Player 1 + 2
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
PORT_MODIFY("IN1") // IN1 - Coins
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(6)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(6)
PORT_SERVICE_NO_TOGGLE( 0x0004, IP_ACTIVE_LOW )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW")
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x0000, DEF_STR( English ) )
PORT_DIPSETTING( 0x0004, DEF_STR( Japanese ) )
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,5,6")
PORT_DIPSETTING( 0x0008, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0000, "2 Coins/1 Credit (1 to continue)" )
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0018, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0028, DEF_STR( 1C_3C ) )
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x0100, "1" )
PORT_DIPSETTING( 0x0000, "2" )
PORT_DIPSETTING( 0x0300, "3" )
PORT_DIPSETTING( 0x0200, "4" )
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, "150k/300k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0xc000)
PORT_DIPSETTING( 0x0400, "150k/350k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0xa000)
PORT_DIPSETTING( 0x0400, "150k/350k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0xe000)
PORT_DIPSETTING( 0x0400, "150k/400k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0x6000)
PORT_DIPSETTING( 0x0400, "150k/400k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0x8000)
PORT_DIPSETTING( 0x0400, "150k/400k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0x2000)
PORT_DIPSETTING( 0x0400, "200k/500k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0x4000)
PORT_DIPSETTING( 0x0400, "200k/500k" ) PORT_CONDITION("DSW", 0xe000, PORTCOND_EQUALS, 0x0000)
PORT_DIPNAME( 0x1800, 0x1800, "Damage" ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x1800, "+0" )
PORT_DIPSETTING( 0x1000, "+1" )
PORT_DIPSETTING( 0x0800, "+2" )
PORT_DIPSETTING( 0x0000, "+3" )
PORT_DIPNAME( 0xe000, 0xe000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7,8")
PORT_DIPSETTING( 0xc000, DEF_STR( Very_Easy ) )
PORT_DIPSETTING( 0xa000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0xe000, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x6000, "Medium Hard" )
PORT_DIPSETTING( 0x8000, "Hard 1" )
PORT_DIPSETTING( 0x2000, "Hard 2" )
PORT_DIPSETTING( 0x4000, DEF_STR( Very_Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
INPUT_PORTS_END
static INPUT_PORTS_START( theroes )
PORT_INCLUDE( gaia )
PORT_MODIFY("DSW")
PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x0000, DEF_STR( English ) )
PORT_DIPSETTING( 0x0004, "Chinese" )
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, "150k/300k" ) PORT_CONDITION("DSW", 0xc000, PORTCOND_EQUALS, 0x8000)
PORT_DIPSETTING( 0x0400, "150k/350k" ) PORT_CONDITION("DSW", 0xc000, PORTCOND_EQUALS, 0xc000)
PORT_DIPSETTING( 0x0400, "150k/400k" ) PORT_CONDITION("DSW", 0xc000, PORTCOND_EQUALS, 0x4000)
PORT_DIPSETTING( 0x0400, "200k/500k" ) PORT_CONDITION("DSW", 0xc000, PORTCOND_EQUALS, 0x0000)
PORT_DIPUNKNOWN_DIPLOC( 0x2000, 0x2000, "SW2:6" )
PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
PORT_DIPSETTING( 0x8000, DEF_STR( Very_Easy ) )
PORT_DIPSETTING( 0xc000, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x4000, "Medium Hard" )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
INPUT_PORTS_END
/* Mazinger Z (has region stored in Eeprom) */
static INPUT_PORTS_START( mazinger )
PORT_INCLUDE( cave )
PORT_START("EEPROM") // Eeprom Region
PORT_DIPNAME( 0xff, 0x31, DEF_STR( Region ) )
PORT_DIPSETTING( 0x30, DEF_STR( Japan ) )
PORT_DIPSETTING( 0x31, DEF_STR( World ) )
INPUT_PORTS_END
/* Sailor Moon / Air Gallet (has region stored in Eeprom) */
static INPUT_PORTS_START( sailormn )
PORT_INCLUDE( cave )
PORT_START("EEPROM") // Eeprom Region
PORT_DIPNAME( 0xff, 0x02, DEF_STR( Region ) )
PORT_DIPSETTING( 0x00, DEF_STR( Japan ) )
PORT_DIPSETTING( 0x01, DEF_STR( USA ) )
PORT_DIPSETTING( 0x02, DEF_STR( Europe ) )
PORT_DIPSETTING( 0x03, "Hong Kong" )
PORT_DIPSETTING( 0x04, "Taiwan" )
PORT_DIPSETTING( 0x05, "Korea" )
INPUT_PORTS_END
/* Normal layout but with 4 buttons */
static INPUT_PORTS_START( metmqstr )
PORT_INCLUDE( cave )
PORT_MODIFY("IN0") // IN0 - Player 1
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
PORT_MODIFY("IN1") // IN1 - Player 2
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
INPUT_PORTS_END
/* Different layout */
static INPUT_PORTS_START( guwange )
PORT_START("IN0") // IN0 - Player 1 & 2
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_START("IN1") // IN1 - Coins
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(6)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(6)
PORT_SERVICE_NO_TOGGLE( 0x0004, IP_ACTIVE_LOW )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
static INPUT_PORTS_START( korokoro )
PORT_START("IN0") // IN0
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(10) // bit 0x0010 of leds (coin)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(10) // bit 0x0020 of leds (does coin sound)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(10) // bit 0x0080 of leds
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON1 ) // round button (choose)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) // square button (select in service mode / medal out in game)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // service medal out?
PORT_SERVICE( 0x2000, IP_ACTIVE_LOW )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(korokoro_hopper_r, NULL) // motor / hopper status ???
PORT_START("IN1") // IN1
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
/***************************************************************************
Graphics Layouts
***************************************************************************/
/* 8x8x4 tiles */
static const gfx_layout layout_8x8x4 =
{
8,8,
RGN_FRAC(1,1),
4,
{STEP4(0,1)},
{STEP8(0,4)},
{STEP8(0,4*8)},
8*8*4
};
/* 8x8x6 tiles (in a 8x8x8 layout) */
static const gfx_layout layout_8x8x6 =
{
8,8,
RGN_FRAC(1,1),
6,
{8,9, 0,1,2,3},
{0*4,1*4,4*4,5*4,8*4,9*4,12*4,13*4},
{0*64,1*64,2*64,3*64,4*64,5*64,6*64,7*64},
8*8*8
};
/* 8x8x6 tiles (4 bits in one rom, 2 bits in the other,
unpacked in 2 pages of 4 bits) */
static const gfx_layout layout_8x8x6_2 =
{
8,8,
RGN_FRAC(1,2),
6,
{RGN_FRAC(1,2)+2,RGN_FRAC(1,2)+3, STEP4(0,1)},
{STEP8(0,4)},
{STEP8(0,4*8)},
8*8*4
};
/* 8x8x8 tiles */
static const gfx_layout layout_8x8x8 =
{
8,8,
RGN_FRAC(1,1),
8,
{8,9,10,11, 0,1,2,3},
{0*4,1*4,4*4,5*4,8*4,9*4,12*4,13*4},
{0*64,1*64,2*64,3*64,4*64,5*64,6*64,7*64},
8*8*8
};
#if 0
/* 16x16x8 Zooming Sprites - No need to decode them */
static const gfx_layout layout_sprites =
{
16,16,
RGN_FRAC(1,1),
8,
{STEP8(0,1)},
{STEP16(0,8)},
{STEP16(0,16*8)},
16*16*8
};
#endif
/***************************************************************************
Dangun Feveron
***************************************************************************/
static GFXDECODE_START( dfeveron )
/* There are only $800 colors here, the first half for sprites
the second half for tiles. We use $8000 virtual colors instead
for consistency with games having $8000 real colors.
A PALETTE_INIT function is thus needed for sprites */
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x4, 0x4400, 0x40 ) // [1] Layer 1
GFXDECODE_END
/***************************************************************************
Dodonpachi
***************************************************************************/
static GFXDECODE_START( ddonpach )
/* Layers 01 are 4 bit deep and use the first 16 of every 256
colors for any given color code (a PALETTE_INIT function
is provided for these layers, filling the 8000-83ff entries
in the color table). Layer 2 uses the whole 256 for any given
color code and the 4000-7fff range in the color table. */
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x8000, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x4, 0x8000, 0x40 ) // [1] Layer 1
GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x8, 0x4000, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
Donpachi
***************************************************************************/
static GFXDECODE_START( donpachi )
/* There are only $800 colors here, the first half for sprites
the second half for tiles. We use $8000 virtual colors instead
for consistency with games having $8000 real colors.
A PALETTE_INIT function is thus needed for sprites */
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x4, 0x4400, 0x40 ) // [1] Layer 1
GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x4, 0x4400, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
Esprade
***************************************************************************/
static GFXDECODE_START( esprade )
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x8, 0x4000, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x8, 0x4000, 0x40 ) // [1] Layer 1
GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x8, 0x4000, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
Hotdog Storm
***************************************************************************/
static GFXDECODE_START( hotdogst )
/* There are only $800 colors here, the first half for sprites
the second half for tiles. We use $8000 virtual colors instead
for consistency with games having $8000 real colors.
A PALETTE_INIT function is needed for sprites */
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x4000, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x4, 0x4000, 0x40 ) // [1] Layer 1
GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x4, 0x4000, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
Koro Koro Quest
***************************************************************************/
static GFXDECODE_START( korokoro )
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
GFXDECODE_END
/***************************************************************************
Mazinger Z
***************************************************************************/
static GFXDECODE_START( mazinger )
/* Sprites are 4 bit deep.
Layer 0 is 4 bit deep.
Layer 1 uses 64 color palettes, but the game only fills the
first 16 colors of each palette, Indeed, the gfx data in ROM
is empty in the top 4 bits. Additionally even if there are
$40 color codes, only $400 colors are addressable.
A PALETTE_INIT function is thus needed for sprites and layer 0. */
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x4000, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x6, 0x4400, 0x40 ) // [1] Layer 1
GFXDECODE_END
/***************************************************************************
Power Instinct 2
***************************************************************************/
static GFXDECODE_START( pwrinst2 )
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x0800+0x8000, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x4, 0x1000+0x8000, 0x40 ) // [1] Layer 1
GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x4, 0x1800+0x8000, 0x40 ) // [2] Layer 2
GFXDECODE_ENTRY( "gfx5", 0, layout_8x8x4, 0x2000+0x8000, 0x40 ) // [3] Layer 3
GFXDECODE_END
/***************************************************************************
Sailor Moon
***************************************************************************/
static GFXDECODE_START( sailormn )
/* 4 bit sprites ? */
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
GFXDECODE_ENTRY( "gfx3", 0, layout_8x8x4, 0x4800, 0x40 ) // [1] Layer 1
GFXDECODE_ENTRY( "gfx4", 0, layout_8x8x6_2, 0x4c00, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
Uo Poko
***************************************************************************/
static GFXDECODE_START( uopoko )
// "gfx1" // Sprites
GFXDECODE_ENTRY( "gfx2", 0, layout_8x8x8, 0x4000, 0x40 ) // [0] Layer 0
GFXDECODE_END
/***************************************************************************
Machine Drivers
***************************************************************************/
static MACHINE_RESET( cave )
{
soundbuf.len = 0;
/* modify the eeprom on a reset with the desired region for the games that have the
region factory set in eeprom */
if (cave_region_byte >= 0)
((UINT8 *)eeprom_get_data_pointer(NULL,NULL))[cave_region_byte] = input_port_read(machine, "EEPROM");
}
static const ymz280b_interface ymz280b_intf =
{
sound_irq_gen
};
static void irqhandler(running_machine *machine, int irq)
{
cpu_set_input_line(machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
}
static const ym2151_interface ym2151_config =
{
irqhandler
};
static const ym2203_interface ym2203_config =
{
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
NULL, NULL, NULL, NULL
},
irqhandler
};
/***************************************************************************
Dangun Feveron
***************************************************************************/
static MACHINE_DRIVER_START( dfeveron )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(dfeveron_readmem,dfeveron_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
MDRV_GFXDECODE(dfeveron)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(dfeveron)
MDRV_VIDEO_START(cave_2_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Dodonpachi
***************************************************************************/
static MACHINE_DRIVER_START( ddonpach )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(ddonpach_readmem,ddonpach_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
MDRV_GFXDECODE(ddonpach)
MDRV_PALETTE_LENGTH(0x8000 + 0x40*16) // $400 extra entries for layers 1&2
MDRV_PALETTE_INIT(ddonpach)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Donpachi
***************************************************************************/
static MACHINE_DRIVER_START( donpachi )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(donpachi_readmem,donpachi_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
MDRV_GFXDECODE(donpachi)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(dfeveron)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("oki1", OKIM6295, XTAL_1_056MHz)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.60)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.60)
MDRV_SOUND_ADD("oki2", OKIM6295, 2112000)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Esprade
***************************************************************************/
static MACHINE_DRIVER_START( esprade )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(esprade_readmem,esprade_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
MDRV_GFXDECODE(esprade)
MDRV_PALETTE_LENGTH(0x8000)
MDRV_PALETTE_INIT(cave)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Gaia Crusaders
***************************************************************************/
static MACHINE_DRIVER_START( gaia )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(gaia_readmem,gaia_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 224-1)
MDRV_GFXDECODE(esprade)
MDRV_PALETTE_LENGTH(0x8000)
MDRV_PALETTE_INIT(cave)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Guwange
***************************************************************************/
static MACHINE_DRIVER_START( guwange )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(guwange_readmem,guwange_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
MDRV_GFXDECODE(esprade)
MDRV_PALETTE_LENGTH(0x8000)
MDRV_PALETTE_INIT(cave)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Hotdog Storm
***************************************************************************/
static MACHINE_DRIVER_START( hotdogst )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(hotdogst_readmem,hotdogst_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_CPU_ADD("audio", Z80, XTAL_4MHz)
MDRV_CPU_PROGRAM_MAP(hotdogst_sound_readmem,hotdogst_sound_writemem)
MDRV_CPU_IO_MAP(hotdogst_sound_readport,hotdogst_sound_writeport)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(384, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 384-1, 0, 240-1)
MDRV_GFXDECODE(hotdogst)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(dfeveron)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ym", YM2203, XTAL_4MHz)
MDRV_SOUND_CONFIG(ym2203_config)
MDRV_SOUND_ROUTE(0, "left", 0.20)
MDRV_SOUND_ROUTE(0, "right", 0.20)
MDRV_SOUND_ROUTE(1, "left", 0.20)
MDRV_SOUND_ROUTE(1, "right", 0.20)
MDRV_SOUND_ROUTE(2, "left", 0.20)
MDRV_SOUND_ROUTE(2, "right", 0.20)
MDRV_SOUND_ROUTE(3, "left", 0.80)
MDRV_SOUND_ROUTE(3, "right", 0.80)
MDRV_SOUND_ADD("oki", OKIM6295, XTAL_1_056MHz)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Koro Koro Quest
***************************************************************************/
static MACHINE_DRIVER_START( korokoro )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(korokoro_readmem,korokoro_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(korokoro)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1-2, 0, 240-1-1)
MDRV_GFXDECODE(korokoro)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(korokoro)
MDRV_VIDEO_START(cave_1_layer)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Mazinger Z
***************************************************************************/
static MACHINE_DRIVER_START( mazinger )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(mazinger_readmem,mazinger_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_CPU_ADD("audio", Z80, XTAL_4MHz) // Bidirectional communication
MDRV_CPU_PROGRAM_MAP(mazinger_sound_readmem,mazinger_sound_writemem)
MDRV_CPU_IO_MAP(mazinger_sound_readport,mazinger_sound_writeport)
MDRV_WATCHDOG_TIME_INIT(UINT64_ATTOTIME_IN_SEC(3)) /* a guess, and certainly wrong */
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(384, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 384-1, 0, 240-1)
MDRV_GFXDECODE(mazinger)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(mazinger)
MDRV_VIDEO_START(cave_2_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ym", YM2203, XTAL_4MHz)
MDRV_SOUND_CONFIG(ym2203_config)
MDRV_SOUND_ROUTE(0, "left", 0.20)
MDRV_SOUND_ROUTE(0, "right", 0.20)
MDRV_SOUND_ROUTE(1, "left", 0.20)
MDRV_SOUND_ROUTE(1, "right", 0.20)
MDRV_SOUND_ROUTE(2, "left", 0.20)
MDRV_SOUND_ROUTE(2, "right", 0.20)
MDRV_SOUND_ROUTE(3, "left", 0.60)
MDRV_SOUND_ROUTE(3, "right", 0.60)
MDRV_SOUND_ADD("oki", OKIM6295, XTAL_1_056MHz)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 2.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 2.0)
MACHINE_DRIVER_END
/***************************************************************************
Metamoqester
***************************************************************************/
static MACHINE_DRIVER_START( metmqstr )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_32MHz / 2)
MDRV_CPU_PROGRAM_MAP(metmqstr_readmem,metmqstr_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_CPU_ADD("audio", Z80, XTAL_32MHz / 4)
MDRV_CPU_PROGRAM_MAP(metmqstr_sound_readmem,metmqstr_sound_writemem)
MDRV_CPU_IO_MAP(metmqstr_sound_readport,metmqstr_sound_writeport)
MDRV_WATCHDOG_TIME_INIT(UINT64_ATTOTIME_IN_SEC(3)) /* a guess, and certainly wrong */
MDRV_MACHINE_RESET(cave) /* start with the watchdog armed */
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(0x200, 240)
MDRV_SCREEN_VISIBLE_AREA(0x7d, 0x7d + 0x180-1, 0, 240-1)
MDRV_GFXDECODE(donpachi)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(dfeveron)
MDRV_VIDEO_START(cave_3_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ym", YM2151, XTAL_16MHz / 4)
MDRV_SOUND_CONFIG(ym2151_config)
MDRV_SOUND_ROUTE(0, "left", 1.20)
MDRV_SOUND_ROUTE(1, "right", 1.20)
MDRV_SOUND_ADD("oki1", OKIM6295, XTAL_32MHz / 16 )
MDRV_SOUND_CONFIG(okim6295_interface_pin7high)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.0)
MDRV_SOUND_ADD("oki2", OKIM6295, XTAL_32MHz / 16 )
MDRV_SOUND_CONFIG(okim6295_interface_pin7high)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Power Instinct 2
***************************************************************************/
/* X1 = 12 MHz, X2 = 28 MHz, X3 = 16 MHz. OKI: / 165 mode A ; / 132 mode B */
static MACHINE_DRIVER_START( pwrinst2 )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz) /* 16 MHz */
MDRV_CPU_PROGRAM_MAP(pwrinst2_readmem,pwrinst2_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_CPU_ADD("audio", Z80,XTAL_16MHz / 2) /* 8 MHz */
MDRV_CPU_PROGRAM_MAP(pwrinst2_sound_readmem,pwrinst2_sound_writemem)
MDRV_CPU_IO_MAP(pwrinst2_sound_readport,pwrinst2_sound_writeport)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(0x200, 240)
MDRV_SCREEN_VISIBLE_AREA(0x70, 0x70 + 0x140-1, 0, 240-1)
MDRV_GFXDECODE(pwrinst2)
MDRV_PALETTE_LENGTH(0x8000+0x2800)
MDRV_PALETTE_INIT(pwrinst2)
MDRV_VIDEO_START(cave_4_layers)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ym", YM2203, XTAL_16MHz / 4)
MDRV_SOUND_CONFIG(ym2203_config)
MDRV_SOUND_ROUTE(0, "left", 0.40)
MDRV_SOUND_ROUTE(0, "right", 0.40)
MDRV_SOUND_ROUTE(1, "left", 0.40)
MDRV_SOUND_ROUTE(1, "right", 0.40)
MDRV_SOUND_ROUTE(2, "left", 0.40)
MDRV_SOUND_ROUTE(2, "right", 0.40)
MDRV_SOUND_ROUTE(3, "left", 0.80)
MDRV_SOUND_ROUTE(3, "right", 0.80)
MDRV_SOUND_ADD("oki1", OKIM6295, XTAL_3MHz )
MDRV_SOUND_CONFIG(okim6295_interface_pin7low)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 0.80)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.80)
MDRV_SOUND_ADD("oki2", OKIM6295, XTAL_3MHz )
MDRV_SOUND_CONFIG(okim6295_interface_pin7low)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.00)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.00)
MACHINE_DRIVER_END
/***************************************************************************
Sailor Moon / Air Gallet
***************************************************************************/
static MACHINE_DRIVER_START( sailormn )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(sailormn_readmem,sailormn_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_CPU_ADD("audio", Z80, XTAL_8MHz) // Bidirectional Communication
MDRV_CPU_PROGRAM_MAP(sailormn_sound_readmem,sailormn_sound_writemem)
MDRV_CPU_IO_MAP(sailormn_sound_readport,sailormn_sound_writeport)
// MDRV_INTERLEAVE(10)
MDRV_MACHINE_RESET(cave)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320+1, 240)
MDRV_SCREEN_VISIBLE_AREA(0+1, 320+1-1, 0, 240-1)
MDRV_GFXDECODE(sailormn)
MDRV_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MDRV_PALETTE_INIT(sailormn) // 4 bit sprites, 6 bit tiles
MDRV_VIDEO_START(sailormn_3_layers) /* Layer 2 has 1 banked ROM */
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ym", YM2151, XTAL_16MHz/4)
MDRV_SOUND_CONFIG(ym2151_config)
MDRV_SOUND_ROUTE(0, "left", 0.30)
MDRV_SOUND_ROUTE(1, "right", 0.30)
MDRV_SOUND_ADD("oki1", OKIM6295, 2112000)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.0)
MDRV_SOUND_ADD("oki2", OKIM6295, 2112000)
MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 1.0)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
Uo Poko
***************************************************************************/
static MACHINE_DRIVER_START( uopoko )
/* basic machine hardware */
MDRV_CPU_ADD("main", M68000, XTAL_16MHz)
MDRV_CPU_PROGRAM_MAP(uopoko_readmem,uopoko_writemem)
MDRV_CPU_VBLANK_INT("main", cave_interrupt)
MDRV_NVRAM_HANDLER(cave)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(15625/271.5)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(320, 240)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
MDRV_GFXDECODE(uopoko)
MDRV_PALETTE_LENGTH(0x8000)
MDRV_PALETTE_INIT(cave)
MDRV_VIDEO_START(cave_1_layer)
MDRV_VIDEO_UPDATE(cave)
/* sound hardware */
MDRV_SPEAKER_STANDARD_STEREO("left", "right")
MDRV_SOUND_ADD("ymz", YMZ280B, XTAL_16_9344MHz)
MDRV_SOUND_CONFIG(ymz280b_intf)
MDRV_SOUND_ROUTE(0, "left", 1.0)
MDRV_SOUND_ROUTE(1, "right", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
ROMs Loading
***************************************************************************/
/* 4 bits -> 8 bits. Even and odd pixels are swapped */
static void unpack_sprites(running_machine *machine)
{
const UINT32 len = memory_region_length(machine, "gfx1");
UINT8 *rgn = memory_region(machine, "gfx1");
UINT8 *src = rgn + len / 2 - 1;
UINT8 *dst = rgn + len - 1;
while(dst > src)
{
UINT8 data = *src--;
/* swap even and odd pixels */
*dst-- = data >> 4; *dst-- = data & 0xF;
}
}
/* 4 bits -> 8 bits. Even and odd pixels and even and odd words, are swapped */
static void ddonpach_unpack_sprites(running_machine *machine)
{
const UINT32 len = memory_region_length(machine, "gfx1");
UINT8 *rgn = memory_region(machine, "gfx1");
UINT8 *src = rgn + len / 2 - 1;
UINT8 *dst = rgn + len - 1;
while(dst > src)
{
UINT8 data1= *src--;
UINT8 data2= *src--;
UINT8 data3= *src--;
UINT8 data4= *src--;
/* swap even and odd pixels, and even and odd words */
*dst-- = data2 & 0xF; *dst-- = data2 >> 4;
*dst-- = data1 & 0xF; *dst-- = data1 >> 4;
*dst-- = data4 & 0xF; *dst-- = data4 >> 4;
*dst-- = data3 & 0xF; *dst-- = data3 >> 4;
}
}
/* 2 pages of 4 bits -> 8 bits */
static void esprade_unpack_sprites(running_machine *machine)
{
UINT8 *src = memory_region(machine, "gfx1");
UINT8 *dst = src + memory_region_length(machine, "gfx1");
while(src < dst)
{
UINT8 data1 = src[0];
UINT8 data2 = src[1];
src[0] = ((data1 & 0x0f)<<4) + (data2 & 0x0f);
src[1] = (data1 & 0xf0) + ((data2 & 0xf0)>>4);
src += 2;
}
}
/***************************************************************************
Air Gallet
Banpresto
Runs on identical board to Sailor Moon (several sockets unpopulated)
PCB: BP945A (overstamped with BP962A)
CPU: TMP68HC000P16 (68000, 64 pin DIP)
SND: Z84C0008PEC (Z80, 40 pin DIP), OKI M6295 x 2, YM2151, YM3012
OSC: 28.000MHz, 16.000MHz
RAM: 62256 x 8, NEC 424260 x 2, 6264 x 5
Other Chips:
SGS Thomson ST93C46CB1 (EEPROM)
PALS (same as Sailor Moon, not dumped):
18CV8 label SMBG
18CV8 label SMZ80
18CV8 label SMCPU
GAL16V8 (located near BP962A.U47)
GFX: 038 9437WX711 (176 pin PQFP)
038 9437WX711 (176 pin PQFP)
038 9437WX711 (176 pin PQFP)
013 9346E7002 (240 pin PQFP)
On PCB near JAMMA connector is a small push button to access test mode.
ROMS:
BP962A.U9 27C040 Sound Program
BP962A.U45 27C240 Main Program
BP962A.U47 23C16000 Sound
BP962A.U48 23C16000 Sound
BP962A.U53 23C16000 GFX
BP962A.U54 23C16000 GFX
BP962A.U57 23C16000 GFX
BP962A.U65 23C16000 GFX
BP962A.U76 23C16000 GFX
BP962A.U77 23C16000 GFX
***************************************************************************/
ROM_START( agallet ) /* PCB showed "Taiwan Only" on the copyright notice screen. Region byte in EEPROM */
ROM_REGION( 0x400000, "main", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "bp962a.u45", 0x000000, 0x080000, CRC(24815046) SHA1(f5eeae60b923ae850b335e7898a2760407631d8b) )
//empty
ROM_REGION( 0x88000, "audio", 0 ) /* Z80 code */
ROM_LOAD( "bp962a.u9", 0x00000, 0x08000, CRC(06caddbe) SHA1(6a3cc50558ba19a31b21b7f3ec6c6e2846244ff1) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF
ROM_CONTINUE( 0x10000, 0x78000 )
ROM_REGION( 0x400000 * 2, "gfx1", 0 ) /* Sprites (do not dispose) */
ROM_LOAD( "bp962a.u76", 0x000000, 0x200000, CRC(858da439) SHA1(33a3d2a3ec3fa3364b00e1e43b405e5030a5b2a3) )
ROM_LOAD( "bp962a.u77", 0x200000, 0x200000, CRC(ea2ba35e) SHA1(72487f21d44fe7be9a98068ce7f57a43c132945f) )
ROM_REGION( 0x100000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "bp962a.u53", 0x000000, 0x100000, CRC(fcd9a107) SHA1(169b94db8389e7d47d4d77f36907a62c30fea727) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
ROM_REGION( 0x200000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "bp962a.u54", 0x000000, 0x200000, CRC(0cfa3409) SHA1(17107e26762ef7e3b902fb29a6d7bc534a4d09aa) )
ROM_REGION( (1*0x200000)*2, "gfx4", ROMREGION_DISPOSE ) /* Layer 2 */
/* 4 bit part */
ROM_LOAD( "bp962a.u57", 0x000000, 0x200000, CRC(6d608957) SHA1(15f6e8346f5f95eb229505b1b4666dabeb810ee8) )
/* 2 bit part */
ROM_LOAD( "bp962a.u65", 0x200000, 0x100000, CRC(135fcf9a) SHA1(2e8c89c2627bbdef160d96724d07883fb2fa1a57) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x200000, 0x100000 )
ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #0 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "bp962a.u48", 0x040000, 0x200000, CRC(ae00a1ce) SHA1(5e8c74df0ac77efb3080406870856f958be14f79) ) // 16 x $20000, FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x240000, "oki2", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "bp962a.u47", 0x040000, 0x200000, CRC(6d4e9737) SHA1(81c7ecdfc2d38d0b35e26745866f6672f566f936) ) // 16 x $20000, FIRST AND SECOND HALF IDENTICAL
ROM_END
/***************************************************************************
Fever SOS (International) / Dangun Feveron (Japan)
Board: CV01
OSC: 28.0, 16.0, 16.9 MHz
***************************************************************************/
ROM_START( dfeveron )
ROM_REGION( 0x100000, "main", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "cv01-u34.bin", 0x000000, 0x080000, CRC(be87f19d) SHA1(595239245df3835cdf5a99a6c62480465558d8d3) )
ROM_LOAD16_BYTE( "cv01-u33.bin", 0x000001, 0x080000, CRC(e53a7db3) SHA1(ddced29f78dc3cc89038757b6577ba2ba0d8b041) )
ROM_REGION( 0x800000 * 2, "gfx1", 0 ) /* Sprites: * 2 , do not dispose */
ROM_LOAD( "cv01-u25.bin", 0x000000, 0x400000, CRC(a6f6a95d) SHA1(e1eb45cb5d0e6163edfd9d830633b913fb53c6ca) )
ROM_LOAD( "cv01-u26.bin", 0x400000, 0x400000, CRC(32edb62a) SHA1(3def74e1316b80cc25a8c3ac162cd7bcb8cc807c) )
ROM_REGION( 0x200000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "cv01-u50.bin", 0x000000, 0x200000, CRC(7a344417) SHA1(828bd8f95d2fcc34407e17629ccafc904a4ea12d) )
ROM_REGION( 0x200000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "cv01-u49.bin", 0x000000, 0x200000, CRC(d21cdda7) SHA1(cace4650de580c3c4a037f1f5c32bfc1846b383c) )
ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "cv01-u19.bin", 0x000000, 0x400000, CRC(5f5514da) SHA1(53f27364aee544572a82649c9ff29bacc642b732) )
ROM_END
/*
Fever SOS
The program code checks for 0x05 & 0x19 at the 17th & 18th byte in the EEPROM. Therefore
you cannot convert a Dangun Feveron over to a Fever SOS by changing the 2 program roms
Jumper JP1:
INT Version - 2 & 3
JAP Version - 1 & 2
However there are more differences:
U4:
INT Version - 013 9838EX003
JAP Version - 013 9807EX004 (The second set of numbers are manufacture day codes)
UA2 & UB2:
INT Version - 038 9838WX001
JAP Version - 038 9808WX003 (The second set of numbers are manufacture day codes)
TA8030S (Beside SW1)
INT Version - NOT MOUNTED
JAP Version - TA8030S (WatchDog Timer, might be controlled by JP1)
U47 & U48 - Differ
U38 & U37 - Differ - These chips are Static RAM
It actually looks like the international version is older than
the Japanese version PCB wise, but the software date is 98/09/25
and mine is 98/09/17!
The famous full extent of the JAM is inside the image but so is
"full extent" of the LAW. There are also other version strings
inside the same image look here...
NOTICE
THIS GAME IS FOR USE IN
KOREA ONLY
HONG KONG ONLY
TAIWAN ONLY
SOUTHEAST ASIA ONLY
EUROPE ONLY
U.S.A ONLY
JAPAN ONLY
SALES, EXPORT OR OPERATION
OUTSIDE THIS COUNTRY MAY BE
CONSTRUED AS COPYRIGHT AND
TRADEMARK INFRINGEMENT AND
IS STRICTLY PROHIBITED.
VIOLATOR AND SUBJECT TO
SEVERE PENALTIES AND WILL
BE PROSECUTED TO THE FULL
EXTENT OF THE JAM.
98/09/10 VER.
Look at the version date!
NOTICE
THIS GAME MAY NOT BE SOLD,
EXPORTED OR OPERATED
WITHOUTPROOF OF LEGAL CONSENT
BY CAVE CO.,LTD.
VIOLATION OF THESE TERMS WILL
RESULT IN COPYRIGHT AND
TRADEMARK INFRINGEMENT,AND IS
STRICTLY PROHIBITED.
VIOLATORS ARE SUBJECT TO
SEVERE PENALTIES AND WILL BE
PROSECUTED TO THE FULL EXTENT
OF THE LAW GOVERNED BY THE
COUNTRY OF ORIGIN.
98/09/25 VER
This is from Fever SOS image! Both version strings are present!
The PCB is also different, UD's PCB does not have the Cave logo and
the CV01 marker in the lower left corner of the PCB.
There is some "engrish" story inside the UD image but this is NOT
present in the japanese images...
*/
ROM_START( feversos )
ROM_REGION( 0x100000, "main", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "cv01-u34.sos", 0x000000, 0x080000, CRC(24ef3ce6) SHA1(42799eebbb2686a837b8972aec684143deadca59) )
ROM_LOAD16_BYTE( "cv01-u33.sos", 0x000001, 0x080000, CRC(64ff73fd) SHA1(7fc3a8469cec2361d373a4dac4a547c13ca5f709) )
ROM_REGION( 0x800000 * 2, "gfx1", 0 ) /* Sprites: * 2 , do not dispose */
ROM_LOAD( "cv01-u25.bin", 0x000000, 0x400000, CRC(a6f6a95d) SHA1(e1eb45cb5d0e6163edfd9d830633b913fb53c6ca) )
ROM_LOAD( "cv01-u26.bin", 0x400000, 0x400000, CRC(32edb62a) SHA1(3def74e1316b80cc25a8c3ac162cd7bcb8cc807c) )
ROM_REGION( 0x200000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "cv01-u50.bin", 0x000000, 0x200000, CRC(7a344417) SHA1(828bd8f95d2fcc34407e17629ccafc904a4ea12d) )
ROM_REGION( 0x200000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "cv01-u49.bin", 0x000000, 0x200000, CRC(d21cdda7) SHA1(cace4650de580c3c4a037f1f5c32bfc1846b383c) )
ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "cv01-u19.bin", 0x000000, 0x400000, CRC(5f5514da) SHA1(53f27364aee544572a82649c9ff29bacc642b732) )
ROM_END
/***************************************************************************
Dodonpachi (Japan)
PCB: AT-C03 D2
CPU: MC68000-16
Sound: YMZ280B
OSC: 28.0000MHz
16.0000MHz
16.9MHz (16.9344MHz?)
***************************************************************************/
ROM_START( ddonpach )
ROM_REGION( 0x100000, "main", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "b1.u27", 0x000000, 0x080000, CRC(b5cdc8d3) SHA1(58757b50e21a27e500a82c03f62cf02a85389926) )
ROM_LOAD16_BYTE( "b2.u26", 0x000001, 0x080000, CRC(6bbb063a) SHA1(e5de64b9c3efc0a38a2e0e16b78ee393bff63558) )
ROM_REGION( 0x800000 * 2, "gfx1", 0 ) /* Sprites: * 2, do not dispose */
ROM_LOAD( "u50.bin", 0x000000, 0x200000, CRC(14b260ec) SHA1(33bda210302428d5500115d0c7a839cdfcb67d17) )
ROM_LOAD( "u51.bin", 0x200000, 0x200000, CRC(e7ba8cce) SHA1(ad74a6b7d53760b19587c4a6dbea937daa7e87ce) )
ROM_LOAD( "u52.bin", 0x400000, 0x200000, CRC(02492ee0) SHA1(64d9cc64a4ad189a8b03cf6a749ddb732b4a0014) )
ROM_LOAD( "u53.bin", 0x600000, 0x200000, CRC(cb4c10f0) SHA1(a622e8bd0c938b5d38b392b247400b744d8be288) )
ROM_REGION( 0x200000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "u60.bin", 0x000000, 0x200000, CRC(903096a7) SHA1(a243e903fef7c4a7b71383263e82e42acd869261) )
ROM_REGION( 0x200000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "u61.bin", 0x000000, 0x200000, CRC(d89b7631) SHA1(a66bb4955ca58fab8973ca37a0f971e9a67ce017) )
ROM_REGION( 0x200000, "gfx4", ROMREGION_DISPOSE ) /* Layer 2 */
ROM_LOAD( "u62.bin", 0x000000, 0x200000, CRC(292bfb6b) SHA1(11b385991ee990eb5ef36e136b988802b5f90fa4) )
ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u6.bin", 0x000000, 0x200000, CRC(9dfdafaf) SHA1(f5cb450cdc78a20c3a74c6dac05c9ac3cba08327) )
ROM_LOAD( "u7.bin", 0x200000, 0x200000, CRC(795b17d5) SHA1(cbfc29f1df9600c82e0fdae00edd00da5b73e14c) )
ROM_END
ROM_START( ddonpchj )
ROM_REGION( 0x100000, "main", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u27.bin", 0x000000, 0x080000, CRC(2432ff9b) SHA1(fbc826c30553f6553ead40b312b73c049e8f4bf6) )
ROM_LOAD16_BYTE( "u26.bin", 0x000001, 0x080000, CRC(4f3a914a) SHA1(ae98eba049f1462aa1145f6959b9f9a32c97278f) )
ROM_REGION( 0x800000 * 2, "gfx1", 0 ) /* Sprites: * 2, do not dispose */
ROM_LOAD( "u50.bin", 0x000000, 0x200000, CRC(14b260ec) SHA1(33bda210302428d5500115d0c7a839cdfcb67d17) )
ROM_LOAD( "u51.bin", 0x200000, 0x200000, CRC(e7ba8cce) SHA1(ad74a6b7d53760b19587c4a6dbea937daa7e87ce) )
ROM_LOAD( "u52.bin", 0x400000, 0x200000, CRC(02492ee0) SHA1(64d9cc64a4ad189a8b03cf6a749ddb732b4a0014) )
ROM_LOAD( "u53.bin", 0x600000, 0x200000, CRC(cb4c10f0) SHA1(a622e8bd0c938b5d38b392b247400b744d8be288) )
ROM_REGION( 0x200000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "u60.bin", 0x000000, 0x200000, CRC(903096a7) SHA1(a243e903fef7c4a7b71383263e82e42acd869261) )
ROM_REGION( 0x200000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "u61.bin", 0x000000, 0x200000, CRC(d89b7631) SHA1(a66bb4955ca58fab8973ca37a0f971e9a67ce017) )
ROM_REGION( 0x200000, "gfx4", ROMREGION_DISPOSE ) /* Layer 2 */
ROM_LOAD( "u62.bin", 0x000000, 0x200000, CRC(292bfb6b) SHA1(11b385991ee990eb5ef36e136b988802b5f90fa4) )
ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u6.bin", 0x000000, 0x200000, CRC(9dfdafaf) SHA1(f5cb450cdc78a20c3a74c6dac05c9ac3cba08327) )
ROM_LOAD( "u7.bin", 0x200000, 0x200000, CRC(795b17d5) SHA1(cbfc29f1df9600c82e0fdae00edd00da5b73e14c) )
ROM_END
/***************************************************************************
Donpachi
Known versions:
USA Version 1.12 1995/05/2x
Korea Version 1.12 1995/05/2x
Hong Kong Version 1.10 1995/05/17
Japan Version 1.01 1995/05/11
BOARD #: AT-C01DP-2
CPU: TMP68HC000-16
VOICE: M6295 x2
OSC: 28.000/16.000/4.220MHz
EEPROM: ATMEL 93C46
CUSTOM: ATLUS 8647-01 013
038 9429WX727 x3
NMK 112 (M6295 sample ROM banking)
---------------------------------------------------
filenames devices kind
---------------------------------------------------
PRG.U29 27C4096 68000 main prg.
U58.BIN 27C020 gfx data
ATDP.U32 57C8200 M6295 data
ATDP.U33 57C16200 M6295 data
ATDP.U44 57C16200 gfx data
ATDP.U45 57C16200 gfx data
ATDP.U54 57C8200 gfx data
ATDP.U57 57C8200 gfx data
USA Version
----------------------------------------------------
prgu.U29 27C4002 68000 Main Program
text.u58 27C2001 Labeled as "TEXT"
***************************************************************************/
ROM_START( donpachi )
ROM_REGION( 0x080000, "main", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "prgu.u29", 0x00000, 0x80000, CRC(89c36802) SHA1(7857c726cecca5a4fce282e0d2b873774d2c1b1d) )
ROM_REGION( 0x400000 * 2, "gfx1", 0 ) /* Sprites (do not dispose) */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
ROM_REGION( 0x100000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
ROM_REGION( 0x100000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
ROM_REGION( 0x040000, "gfx4", ROMREGION_DISPOSE ) /* Text / Character Layer */
ROM_LOAD( "text.u58", 0x000000, 0x040000, CRC(5dba06e7) SHA1(f9dab7f6c732a683fddb4cae090a875b3962332b) )
ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
ROM_END
ROM_START( donpacjp )
ROM_REGION( 0x080000, "main", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "prg.u29", 0x00000, 0x80000, CRC(6be14af6) SHA1(5b1158071f160efeded816ae4c4edca1d00d6e05) )
ROM_REGION( 0x400000 * 2, "gfx1", 0 ) /* Sprites (do not dispose) */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
ROM_REGION( 0x100000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
ROM_REGION( 0x100000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
ROM_REGION( 0x040000, "gfx4", ROMREGION_DISPOSE ) /* Text / Character Layer */
ROM_LOAD( "u58.bin", 0x000000, 0x040000, CRC(285379ff) SHA1(b9552edcec29ddf4b552800b145c398b94117ab0) )
ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
ROM_END
ROM_START( donpackr )
ROM_REGION( 0x080000, "main", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "prgk.u26", 0x00000, 0x80000, CRC(bbaf4c8b) SHA1(0f9d42c8c4c5b69e3d39bf768bc4b663f66b4f36) )
ROM_REGION( 0x400000 * 2, "gfx1", 0 ) /* Sprites (do not dispose) */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
ROM_REGION( 0x100000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
ROM_REGION( 0x100000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
ROM_REGION( 0x040000, "gfx4", ROMREGION_DISPOSE ) /* Text / Character Layer */
ROM_LOAD( "u58.bin", 0x000000, 0x040000, CRC(285379ff) SHA1(b9552edcec29ddf4b552800b145c398b94117ab0) )
ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
ROM_END
ROM_START( donpachk )
ROM_REGION( 0x080000, "main", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "37.u29", 0x00000, 0x80000, CRC(71f39f30) SHA1(08a028208f21c073d450a29061604f27775786a8) )
ROM_REGION( 0x400000 * 2, "gfx1", 0 ) /* Sprites (do not dispose) */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
ROM_REGION( 0x100000, "gfx2", ROMREGION_DISPOSE ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
ROM_REGION( 0x100000, "gfx3", ROMREGION_DISPOSE ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a