driver
| driver | galaga.c |
| source | galaga.c (galaga.c on mamedev.org) |
| games | Battles Bosconian (Midway, new version) Bosconian (Midway, old version) Bosconian (new version) Bosconian (old version) Bosconian (older version) Dig Dug (Atari, rev 1) Dig Dug (Atari, rev 2) Dig Dug (manufactured by Sidam) Dig Dug (rev 1) Dig Dug (rev 2) Galaga (Midway set 1 with fast shoot hack) Galaga (Midway set 1) Galaga (Midway set 2) Galaga (Namco rev. B) Galaga (Namco) Gallag Gatsbee Super Xevious Xevios Xevious (Atari set 1) Xevious (Atari set 2) Xevious (Atari set 3) Xevious (Namco) Zig Zag (Dig Dug hardware) |
| information | 0.21 [Nicola Salmoria, Martin Scragg] TODO: - bosco & galaga: The starfield is wrong. The function of STARCLR is unknown. It is not latched and there are no data bits used... - bosco: is the scrolling tilemap placement correct? It is currently aligned so that the test grid shown on startup is correct, but this way an unerased grey strip remains on the left of the screen during the title sequence. - gallag/gatsbee: explosions are not emulated since the bootleg board doesn't have the 54XX custom. Should probably use samples like Battles? - Should Xevios have a 4th Z80 like the other bootlegs? We don't have a dump for that ROM. - xevious: I haven't found any Easter egg in service mode. The main loop is very simple so there might just not be one, though this would be the only Namco game of that era to not have a service mode Easter egg. On the other hand, the service mode in this game is VERY spartan when compared to the other Namco games. - dzigzag: Emulate the 4th CPU (should be similar to battles). NOTES: - The Cabinet Type "dip switch" actually comes from the edge connector, but is mapped in memory in place of dip switch #8. dip switch #8 selects single/dual coin counters and is entirely handled by hardware. - galaga: There is a bug in the sound CPU program. During initialization, it enables NMI before clearing RAM, but the NMI handler doesn't save the registers, so it cannot interrupt program execution. If the NMI happens before the LDIR that clears RAM has finished, the program will crash. - galaga: There were "fast shoot" hacks available, which are not supported. Their effects can be replicated with this line in cheat.dat: galaga:1:070D:0D:100:Fast Shoot - bosco: There appears to be a bug in the code at 0BB1, which handles communication with the 06XX custom chip. First it saves in A' the command to write, then if a transfer is still in progress it jups to 0BC1, does other things, then restores the command from A' and stores it in RAM. At that point (0BE1) it checks again if a transfer is in progress. If the trasnfer has terminated, it jumps to 0BEB, which restores the command from RAM, and jumps back to 0BBA to send the command. However, the instruction at 0BBA is ex af,af', so the command is overwritten with garbage. There's also an exx at 0BBB which seems unnecessary but that's harmless. Anyway, what this bug means is that we must make sure that the 06XX generates NMIs quickly enough to ensure that 0BB1 is usually not called with a transfer still is progress. It doesn't seem possible to prevent it altogether though, so we can only hope that the transfer doesn't terminate in the middle of the function. - bosco: We have two dumps of the sound shape ROM, "prom.1d" and "bosco.spr". Music changes a lot from one version to the other. I'm using the former because it is more similar to the other Namco games. The latter, after masking off the unused top 4 bits and inverting bit 3, matches the Galaga one, so it might have come from a (bootleg?) conversion. - bosco & galaga: The Midway arcade cabinet had an optional rapid fire board, using a 556 to generate autofire while the button was held. That really makes little sense in Galaga! For Bosconian, I guess it was for the boscomdo set I, because the other sets have autofire built-in. - The bosconian video system is (apart from the starfield) almost identical functionally to Rally X, but the hardware is quite different: Rally X has no custom ICs. - digdug: If you enter service mode and press press service coin something like the following is written at the bottom of the screen: 99.9999.9999.9999.9999. This is explained in the manual: it is the number of games played, of points, etc. The counters start from 999 and count backwards. - gallag is identical to galagao, apart from the title changed to "GALLAG" and the copyright notice changed from "(c) 1981 NAMCO LTD" to "1 9 8 2" (and the Namco logo removed from the gfx). The only interesting thing about it is the 4th Z80, used to simulate the custom 5xXX chips of the original. It also has different explosion and starfield circuitries, to do without the Namco custom chips. - Differences between versions of digdug: The background graphics are slightly different in the Atari versions; the earth is less regular. - "digduga1" is identical to "digdugb", apart from the gfx and copyright notices changed from "NAMCO LTD." to "ATARI INC.". - "digdug" fixes two bugs that were present in "digdugb": First, as monster speed increased in later rounds it could eventually roll over to 0, causing the monsters to stop moving altogether. Second, "double-killing" a monster by bursting it and immediately dropping a rock on the corpse could result in the round not ending even after all monsters were killed. This set also has the code to save high scores to EEPROM rewritten, though the reason for the changes is unclear. - "digdugat" is almost identical to "digdug" (apart from the Atari gfx/copyright changes), but there are three added instructions in the CPU0 program that change the code alignment. The change eliminates the "kill screen" at round 256 by making the round number roll over to 156, and hides the rollover from the player by only ever displaying the lower two digits of the round number. Interestingly, "digdug" actually contains all the code to implement the rollover (at $0018-$0026) but just doesn't call it, implying that Namco deliberately chose to keep the kill screen in this version. - "digsid" is intermediate between "digdugb" and "digdug"; it has the changed EEPROM handling, but not the gameplay bug fixes. It has some unique changes as well: the initial high scores are 25000 instead of 10000, and the game begins on the screen that is round 4 in the other sets, skipping the first three screens. The latter change seems likely to have been done by Namco themselves and not by Sidam, as it involves insertion of code right in the middle of the CPU0 program and realignment of all the code after the insertion. - "dzigzag" and "digdugb" are identical, apart from the hacked gfx and the copyright notices changed from "NAMCO LTD." to "1 9 8 2". It's a bootleg of "digdugb", and not of "digduga1", because the hidden "NAMCO" string at offset 0x1eea of CPU2 is still present, while it is replaced by "ATARI" in digduga1. The only interesting thing about the bootleg is the 4th Z80, used to simulate the custom 5xXX chips of the original. WIP: - 0.125u3: Aaron Giles/Couriersud fixed dipswitch information is not being readded properly when .CFG is read in all sets. Couriersud fixed player 2 has all sprites offset by an inch or two in cocktail mode. - 0.118u4: Alex Jackson converted the inputs in galaga.c to tags, using INCLUDE/MODIFY for clones. - 0.112u2: Added audiogalaga.c. - 0.104u8: Andre Hufschmidt added save state support to the galaga.c games. - 0.93: Added clock parameter to Namco sound (96000 Hz). - 0.79u1: Merged bosco.c, digdug.c and xevious.c with galaga.c driver. Added includesgalaga.h. Removed machineosco.c, machinedigdug.c, machinegalaga.c and sndhrdwosco.c. Big 80s Namco Update [Nicola Salmoria]: This affects the first Namco games that used custom I/O chips. Files that are no longer needed and should be removed: drivers/bosco.c, drivers/xevious.c, drivers/digdug.c, machine/digdug.c, machine/galaga.c, machine/bosco.c, machine/polepos.c, sndhrdw/bosco.c. Added three new sound chips: Namco 15XX, Namco 52XX, Namco 54XX, and changed drivers to use them (Namco 54XX is just a placeholder playing samples, until the chip is reverse engineered), MAME testers bugs fixed: digdug063gre, galaga057gre, bosco071u2gre, poleposc059gra, added EAROM support to digdug, extensive documentation of ROM names and placement, and differences between Namco and licensed versions, converted all drivers to tilemaps, and made gfx emulation more accurate according to schematics, IP_KEY_PREVIOUS and IP_JOY_PREVIOUS are no longer used by any driver: they may be removed from the core, support for start lamps, coin counters and coin lockout (all internallyhandled by the custom I/O chip), toggling the test switch while the game is running enters test mode without need to manually reset, found and documented test mode Easter eggs in all games except Xevious, bosconian now uses a different sound PROM, which seems more correct, galaga uses better dumps of the PROMs, with the unused top 4 bits set to 0, correct handling of 52XX sample start/end pointers in ROM, better emulation of 50XX custom, no more need for hacks in bosconian, swapped digdug and digdugb, the main set should be the newer one, removed these galaga clones: nebulbee (copyright/name change), galagab2 (mix 'n match of ROMs from other sets), galaga84 (copyright/gfx change), galagads (1-byte hack to get fast shoot, reproducible with this line in cheat.dat: galaga:1:070D:0D:100:Fast Shoot), added Galaga rev. B, which is now the main set, renamed the other galagao, added galagamk, a different Midway version, removed various bad dumps from polepos2b and poleps2c, they turned out to be the same version so poleps2c is removed, drivers/locomotn.c is no longer needed and should be removed, converted to tilemaps, consolidated as much as I could, fixed: jungler37b3gre and correct tile/sprite priority handling (also in Bosconian). - 2nd July 2001: SUZ updated the Xevious driver, adding two new samples and adjusting clock frequencies. - 0.37b12: Changed VSync to 60.606060Hz. - 0.27: Added bosco.c and xevious.c driver, machineosco.c, vidhrdwosco.c, machinexevious.c, vidhrdwxevious.c and sndhrdwosco.c. - 0.26: Added digdug.c driver, machinedigdug.c and vidhrdwdigdug.c. - 0.25: Removed xevious.c driver, machinexevious.c and vidhrdwxevious.c. - 0.23: Added xevious.c driver, machinexevious.c and vidhrdwxevious.c. - 0.21: Added galaga.c driver, machinegalaga.c and vidhrdwgalaga.c. |
PCB information
| bosco | Bosconian (new version)[03/04/2000]
Bosconian (Old 2 JPN Ver.)
(c)1981 Namco
BOS1_1.3N
BOS1_2.3M
BOS1_3.3L
BOS1_4.3K
BOS1_5B.3J
BOS1_6.3H
BOS1_7.3E
BOS1_9.5N
BOS1_10.5M
BOS1_11.5K
BOS1_13.5E
BOS1_14.5D
BOS1-1.1D
BOS1-2.5C
BOS1-3.2D
BOS1-4.2R
BOS1-5.4M
BOS1-6.6B
BOS1-7.7H
Dumped 03/04/2000
[Mar/06/2000]
Bosconian (JPN NewVer.)
(c)1981 Namco
NEW ROM
BOS3_1.BIN
BOS3_6.BIN
Dumped 03/06/2000
-
[Apr/08/1993]
This board appears to be identical to Galaga, but uses
a 4-way joystick
-
[MAME]
CPU #1:
0000-3fff ROM
CPU #2:
0000-1fff ROM
CPU #3:
0000-1fff ROM
ALL CPUS:
8000-83ff Video RAM
8400-87ff Color RAM
8b80-8bff sprite code/color
9380-93ff sprite position
9b80-9bff sprite control
8800-9fff RAM
read:
6800-6807 dip switches (only bits 0 and 1 are used - bit 0 is DSW1, bit 1 is DSW2)
dsw1:
bit 6-7 lives
bit 3-5 bonus
bit 0-2 coins per play
dsw2: (bootleg version, the original version is slightly different)
bit 7 cocktail/upright (1 = upright)
bit 6 ?
bit 5 RACK TEST
bit 4 pause (0 = paused, 1 = not paused)
bit 3 ?
bit 2 ?
bit 0-1 difficulty
7000- custom IO chip return values
7100 custom IO chip status ($10 = command executed)
write:
6805 sound voice 1 waveform (nibble)
6811-6813 sound voice 1 frequency (nibble)
6815 sound voice 1 volume (nibble)
680a sound voice 2 waveform (nibble)
6816-6818 sound voice 2 frequency (nibble)
681a sound voice 2 volume (nibble)
680f sound voice 3 waveform (nibble)
681b-681d sound voice 3 frequency (nibble)
681f sound voice 3 volume (nibble)
6820 cpu #1 irq acknowledge/enable
6821 cpu #2 irq acknowledge/enable
6822 cpu #3 nmi acknowledge/enable
6823 if 0, halt CPU #2 and #3
6830 Watchdog reset?
7000- custom IO chip parameters
7100 custom IO chip command (see machine/bosco.c for more details)
a000-a002 starfield scroll direction/speed (only bit 0 is significant)
a003-a005 starfield blink?
a007 flip screen
Interrupts:
CPU #1 IRQ mode 1
NMI is triggered by the custom IO chip to signal the CPU to read/write
parameters
CPU #2 IRQ mode 1
CPU #3 NMI (@120Hz)
- |
| digdug | Dig Dug (rev 2)[06/09/93]
Atari Dig Dug EPROMs
part number board & loc type
----------- ----------- ----
136007.108 main 5K 2716
136007.116 main 5D 2732
136007.217 main 5C 2732
136007.119 main 5B 2732
136007.218 main 5A 2732
136007.104 main 2A 2732
136007.103 main 2B/C 2732
136007.101 main 2C/D 2732
136007.102 main 2E 2732
136007.107 main 2K/L 2732
136007.106 main 2N 2732
136007.105 main 2P 2732
136007.115 main 4F 2732
136007.114 main 4J 2732
There is an alternate ROM set consisting of the above chips, but with
numbers 105 and 106 switched for the following:
136007.206 main 2N 2732 (BAD)
136007.205 main 2P 2732
136007.205 differs from its 105 counterpart in two bytes; probably for
verifying the 205 and 206 ROMs. Unfortunately, the 136007.206 chip I
have is bad, and the data I *can* read is included here as a placeholder
only. Consequently, I do not know what's different about the 2xx series
ROMs. Anyone with a good 206 is encouraged to upload it.
[Oct/29/96]
Atari Dig Dug
file name &
part number board & loc type
----------- ----------- ----
136007.218 main 5A 2532
136007.119 main 5B 2532
136007.217 main 5C 2532
136007.116 main 5D 2532
136007.108 main 5K 2716
136007.115 main 4F 2532
136007.114 main 4J 2732
136007.104 main 2A 2732
136007.103 main 2B/C 2732
136007.101 main 2C/D 2732
136007.102 main 2E 2732
136007.107 main 2K/L 2732
136007.106 main 2N 2732
136007.105 main 2P 2732
There is an alternate ROM set consisting of the above chips, but with
numbers 105 and 106 switched for the following:
136007.206 main 2N 2732 (BAD)
136007.205 main 2P 2732
136007.205 differs from its 105 counterpart in two bytes; probably for
verifying the 205 and 206 ROMs. Unfortunately, the 136007.206 chip I
have is bad.
Gregg Woodcock here; I replaced the bad 206 ROM with a good image.
Also, I have 2 boardsets and BOTH are different than the sets described
above. My 2 sets have all ROMs the same except for 126/114, 204/104,
203/103, 201/101, 202/102, 206/106, and 205/105. Obviously, some of
these can be used in pairs exclusive from the others (such as the
106/206 and 105/205 swap). It might be fun to spend some time swapping
these around to see what happens...
file name &
part number board & loc type
----------- ----------- ----
136007.118 main 5A 2532
136007.119 main 5B 2532
136007.117 main 5C 2532
136007.116 main 5D 2532
136007.108 main 5K 2716
136007.115 main 4F 2532
136007.126 main 4J 2732 or .114 (.126 is a masked PROM)
136007.204 main 2A 2732 or .104
136007.203 main 2B/C 2732 or .103
136007.201 main 2C/D 2732 or .101
136007.202 main 2E 2732 or .102
136007.107 main 2K/L 2732
136007.206 main 2N 2732 or .106
136007.205 main 2P 2732 or .105
[Jun/21/98]
DIG DUG ATARI
BOARD TYPE 2 HAS THREE Z80 PROCESSORS ON THE END
OPPOSITE THE CONNECTOR
THE 2XX CHIPS APPEAR TO BE A LATER VERSION
BOARD TYPE 1 BOARD TYPE 2
NAME POSITION TYPE POSITION
--------------------------------------------
101 6L 2732 2C/D
102 6M " 2E
103 6N " 2B/C
104 6R " 2A
105 6C " 2P
106 6D " 2N
107 5L " 2K/L
108 8R 2716 5K
114 9N 2732 4J
115 10C 2532 4F
116 8C " 5D
117 7C " 5C
118 8A " 5A
119 7A " 5B
201 2CD 2732 2C/D
202 2E " 2E
203 2BC " 2B/C
204 2A " 2A
205 2P " 2P
206 2N " 2N
PROM 10A (109) 2KL 82S129
PROM 8F (111) 4G 82S129
11A (110) 2P 82S129
8L (113) 1R 82S123
4N (112) 10KL 82S129
[Oct/29/96]
Atari Dig Dug EPROMs
part number board & loc type BOARD# 2 LOC
----------- ----------- ---- ----------------------------
136007.108 main 5K 2716 8R
136007.116 main 5D 2732 8C
136007.217 main 5C 2732 .117 7C
136007.119 main 5B 2732 7A/B
136007.218 main 5A 2732 .118 8A/B
136007.104 main 2A 2732 6R
136007.103 main 2B/C 2732 6N/P
136007.101 main 2C/D 2732 6L
136007.102 main 2E 2732 6M
136007.107 main 2K/L 2732 5L
136007.106 main 2N 2732 6D
136007.105 main 2P 2732 6C
136007.115 main 4F 2732 10C/D
136007.114 main 4J 2732 9N
There is an alternate ROM set consisting of the above chips, but with
numbers 105 and 106 switched for the following:
136007.206 main 2N 2732 (BAD)
136007.205 main 2P 2732
136007.205 differs from its 105 counterpart in two bytes; probably for
verifying the 205 and 206 ROMs. Unfortunately, the 136007.206 chip I
have is bad, and the data I *can* read is included here as a placeholder
only. Consequently, I do not know what's different about the 2xx series
ROMs. Anyone with a good 206 is encouraged to upload it.
-
[May/27/97]
DIG DUG - NAMCO
---------------
These are ROMS from my original Dig Dug board. The names are taken directly
from the labels on the roms. The socket where rom '8' would go is empty -
hence there is no rom '8'
As usual I have done my 'three read' method with each rom set being
read independantly three times. All rom sets checked out with no differences
in any of them.
The board is *packed* with custom chips. The board itself is two layers
with roms 1-7 being on one side.
These roms are to be used by those owning the original board in the event
that any of the eproms fail.
27th May 1997
-
[Jul/26/2007]
Dig Dug (Sidam bootleg)
Sidam 1982
CPU on main PCB (Sidam 11500):
3x MK3880-4IRL-Z80CPU (main)
1x LM324N (sound)
1x TDA2003 (sound)
1x custom 0640 (DIL28)(interface to custom 5303)
1x custom 0748 (DIL28)(clock divider)
3x custom 0883 (DIL28)(bus controller)
1x custom 5156 (DIL42)(I/O)
1x custom 5303 (DIL42)(I/O)
1x oscillator 18432
on bottom PCB (Sidam 11510):
1x custom 0037 (DIL28)(unknown)
1x custom 0228 (DIL28)(gfx data shifter and mixer(16-bit in, 4-bit out))
1x custom 0425 (DIL28)(sprite address generator)
1x custom 0764 (DIL28)(clock divider)
1x custom DD1-6 (DIL20 300mil)(unknown)
ROMs on main PCB (Sidam 11500):
7x TMS2532JL
2x TBP24S10N (11220, 11221)
on bottom PCB (Sidam 11510):
1x TMS2516JL (8)
6x D2732A
1x TBP24S10N (11523)
1x SN74S288N (11524)
Note on main PCB (Sidam 11500):
1x 22x2 edge connector
1x 3 legs power connector
1x 50 pins flat cable connector to bottom
1x trimmer (volume)
2x 8x2 switches DIP
on bottom PCB (Sidam 11510):
1x 50 pins flat cable connector to main
1x 6 legs connector
Funzionamento Non testata
In vendita No
Dumped 26/07/2007
-
|
| galaga | Galaga (Namco rev. B)[Nov/10/95]
ROM Images for Galaga (c) Bally-Midway/Namco
Board Label Position Checksum Filesize Device
================================================================
CPU 3200A 3N D600 4096 2732A
CPU 3300B 3M 4A00 4096 2732A
CPU 3400C 3L 0600 4096 2732A
CPU 3500D 3K 5000 4096 2732A
CPU 3600E 3J B6FF 4096 2732A
CPU 3700G 3E 50FF 4096 2732A
CPU ----- 1D B473 256 Harris 7611
CPU ----- 5C 5F74 256 Harris 7611
Video 2800L 4D DD0C 4096 2732A
Video 2700K 4F B18E 4096 2732A
Video 2600J 4L 6627 4096 2732A
Video ----- 2N 6CEC 256 Harris 7611
Video ----- 5N 4DEC 32 Harris 7603
[Jul/05/98]
Galaga (bootleg)
GALLAG.6 contains code for a fourth Z80 used to replace the Namco
custom I/O chip.
[Apr/26/98]
----------------------
Galaga by Namco (1981)
----------------------
Bootleg archive 2 (Galaga Pt 2 - new rapid fire version)
Location Type File ID Checksum
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CPU B4 2732 R1 DB5E
CPU C4 2732 R2 409A
CPU D4 2732 R3 F346
CPU E4 2732 R4 4B1E
CPU J4 2732 R5 B2FF *
CPU E5 2732 R6 D121 *
CPU K4 2732 R7 66FF *
GFX R5 2732 R8 D60A *
GFX A7 2732 R9 B18E *
GFX A6 2732 R10 6627 *
GFX P9 TBP18S030 1.BPR 0E48 *
CPU M5 TBP24S10 2.BPR 0715 *
CPU L1 TBP24S10 3.BPR 074C *
GFX P4 TBP24S10 4.BPR 0241 *
GFX D1 TBP24S10 5.BPR 01C0 *
Note: CPU - Top PCB (DG-09-2)
GFX - Lower PCB (DG-07-2)
* - Same images as in the other bootleg archives
- This PCB is a two board set with the top board
having a small sub-board at location 4F.
TBP18S030 is compatible to a MB7051, N82S123...
TBP24S10 is compatible to a MB7052, N82S129...
[Apr/26/98]
----------------------
Galaga by Namco (1981)
----------------------
Bootleg archive 3 (Nebulas Bee)
Location Type File ID Checksum
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CPU 4B 2732 R1 DBE1
CPU 4C 2732 R2 5A13
CPU 4D 2732 R3 0D00
CPU 4E 2732 R4 521B
CPU 4J 2732 R5 B2FF *
CPU 5E 2732 R6 CDE6
CPU 4K 2732 R7 66FF *
GFX 5R 2732 R8 DD0C
GFX 7A 2732 R9 B18E *
GFX 6A 2732 R10 6627 *
GFX P9 TBP18S030 1.BPR 0E48 *
CPU M5 TBP24S10 2.BPR 0715 *
CPU L1 TBP24S10 3.BPR 074C *
GFX P4 TBP24S10 4.BPR 0241 *
GFX D1 TBP24S10 5.BPR 01C0 *
Note: CPU - Top PCB (DG-09-2)
GFX - Lower PCB (DG-07-2)
* - Same images as in the other bootleg archives
- This PCB is a two board set with the top board
having a small sub-board at location 4F.
TBP18S030 is compatible to a MB7051, N82S123...
TBP24S10 is compatible to a MB7052, N82S129...
-
[Jab/31/98]
Bootleg Galaga (22pin edge connector)
CPU bd
+-----------------------------------+
| |
L1.3
G7 G5 G4 G3 G2 G1
z80 z80 z80 G6 z80
M5.2
| |
+-----------------------------------+
VID
+-----------------------------------+
| |
P4.4
G11 G9
G10
P9.CLR
| |
+-----------------------------------+
-
[???]
These Roms are from a bootleg (pirate) board. It is *completely
different from the original Bally/Midway board. It consists of 2
piggybacked boards and 1 edge connector for I/O. There is a large board
and a somewhat smaller board. The only identifying markings on it are a
sticker with the label "Made in Japan SP-14" and a hand-etched "SP88
7-21-83"; no company name, etc. (surprise, surprise). The filename
convention is "galaga" for the game name, "bl" for "BootLeg", ".1_" for
1st bootleg board (there are many) and then a hex number for the ROM
number (1-10 = 1-a). The ROMs are all 2732's and have the following
locations:
ROM |Board|Which|
# | Loc.|Board| filename
----+-----+-----+------------
1 | 4B | Big |galagabl.1_1
2 | 4C | Big |galagabl.1_2
3 | 4D | Big |galagabl.1_3
4 | 4E | Big |galagabl.1_4
5 | 4J | Big |galagabl.1_5
6 | 5E | Big |galagabl.1_6
7 | 4K | Big |galagabl.1_7
8 | R5 |Small|galagabl.1_8
9 | A7 |Small|galagabl.1_9
10 | A6 |Small|galagabl.1_a
-
[???]
Galaga by Namco (1981)
These images were actually from a pirate board but the game still has the
Namco copyright. I have christened the game "Galaga Green" to distinguish it
from the original and "Galag Blue" pirate boards. The pinout of this board is
the same as the original with the exception that the video signals are on the
edge connector and there is no separate video connector.
All images are 2732
[Jul/29/93]
Galaga ROMs
-----------
The Galaga ROMs are standard Intel 2732A's (mine are 300ns).
They are located on the motherboard as follows:
Galaga CPU board (with the edge connector):
3200A - 3N
3300B - 3M
3400C - 3L
3500D - 3K
3600E - 3J
3700G - 3E
Galaga Video board:
2600J - 4L
2700K - 4F
2800L - 4D
The ROMS with the .GAL extension are the original version of Galaga.
All shots fire normally and the Galaga Cheat works.
The .G1 files are several different revisions. If you replace 3600E.GAL with
3600E.G1 you will get a game that gives you shots that travel several times
faster than normal. (Just you, not the enemies.)
If you replace the other 3 (only), you will get a game that does NOT allow
the infamous Galaga cheat. When I replaced chip 3200A with the .G1, I could
not fire, when I replaced 3300B, none of my controls worked. So I assume
that if you replace both of these, it will work (I didn't have time to try.)
If you replace 3500D only, nothing apparent happens- I'd bet that this removes
the Galaga Cheat (I didn't have time to test it.)
[Apr/26/98]
----------------------
Galaga by Namco (1981)
----------------------
Location Type File ID Checksum
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CPU 3N 2732 MK2-1 DF00
CPU 3M 2732 MK2-2 4700
CPU 3L 2732 MK2-3 0600
CPU 3K 2732 MK2-4 5000
CPU 3J 2732 GG1-5 B2FF
CPU 3E 2732 GG1-7B 43FF
VID 4L 2732 GG1-9 DD0C
VID 4F 2732 GG1-10 B18E
VID 4D 2732 GG1-11 6627
CPU 1D MB7052 GG1-1.BPR 074C
CPU 4C MB7052 GG1-2.BPR 0715
GFX 1C MB7052 GG1-3.BPR 01C0
GFX 2N MB7052 GG1-4.BPR 0241
GFX 5N MB7051 GG1-5.BPR 0E48
Note: CPU - CPU PCB 23149611 (23149631)
GFX - Graphics PCB 23149612 (23149632)
MB7052 is compatible to a N82S129, TBP24S10...
MB7051 is compatible to a N82S123, TBP18S030...
This PCB was the same as the NAMCO PCB except
that the MK2 ROMs had hand written labels.
[Apr/26/98]
----------------------
Galaga by Namco (1981)
----------------------
Bootleg archive 1 (Gallag)
Location Type File ID Checksum
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CPU B4 2732 R1 DC00
CPU C4 2732 R2 5900 [ GALLAG, 1 9 8 2 ]
CPU C4 2732 R2.alt 5900 *1 [ GALAGA, 1981 NAMCO ]
CPU D4 2732 R3 0E00
CPU E4 2732 R4 5200
CPU J4 2732 R5 B2FF *
CPU E5 2732 R6 D121 *
CPU K4 2732 R7 66FF *
GFX R5 2732 R8 D60A *
GFX A7 2732 R9 B18E *
GFX A6 2732 R10 6627 *
GFX P9 TBP18S030 1.BPR 0E48 *
CPU M5 TBP24S10 2.BPR 0715 *
CPU L1 TBP24S10 3.BPR 074C *
GFX P4 TBP24S10 4.BPR 0241 *
GFX D1 TBP24S10 5.BPR 01C0 *
Note: CPU - Top PCB (DG-09-2)
GFX - Lower PCB (DG-07-2)
* - Same images as in the other bootleg archives
*1 - I changed the ROM code so it would display GALAGA
and 1981 NAMCO instead of GALLAG and 1 9 8 2.
- This PCB is a two board set with the top board
having a small sub-board at location 4F.
TBP18S030 is compatible to a MB7051, N82S123...
TBP24S10 is compatible to a MB7052, N82S129...
[Apr/26/98]
-----------------------
Galaga by Namco (1981)
-----------------------
Bootleg archive 4 (Midway MFG. copyright)
Location Type File ID Checksum
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CPU B4 2732 R1 DF00
CPU C4 2732 R2 4700
CPU D4 2732 R3 0600
CPU E4 2732 R4 5000
CPU J4 2732 R5 B2FF *
CPU E5 2732 R6 D121 *
CPU K4 2732 R7 66FF *
GFX R5 2732 R8 D60A *
GFX A7 2732 R9 B18E *
GFX A6 2732 R10 6627 *
GFX P9 TBP18S030 1.BPR 0E48 *
CPU M5 TBP24S10 2.BPR 0715 *
CPU L1 TBP24S10 3.BPR 074C *
GFX P4 TBP24S10 4.BPR 0241 *
GFX D1 TBP24S10 5.BPR 01C0 *
Note: CPU - Top PCB (DG-09-2)
GFX - Lower PCB (DG-07-2)
* - Same images as in the other bootleg archives
- This PCB is a two board set with the top board
having a small sub-board at location 4F.
TBP18S030 is compatible to a MB7051, N82S123...
TBP24S10 is compatible to a MB7052, N82S129...
[09/08/93]
These Roms are from a bootleg (pirate) board. It is *completely
different from the original Bally/Midway board. It consists of 2
piggybacked boards and 1 edge connector for I/O. There is a large board
and a somewhat smaller board. The only identifying markings on it are a
sticker with the label "Made in Japan SP-14" and a hand-etched "SP88
7-21-83"; no company name, etc. (surprise, surprise). The filename
convention is "galaga" for the game name, "bl" for "BootLeg", ".1_" for
1st bootleg board (there are many) and then a hex number for the ROM
number (1-10 = 1-a). The ROMs are all 2732's and have the following
locations:
ROM |Board|Which|
# | Loc.|Board| filename
----+-----+-----+------------
1 | 4B | Big |galagabl.1_1
2 | 4C | Big |galagabl.1_2
3 | 4D | Big |galagabl.1_3
4 | 4E | Big |galagabl.1_4
5 | 4J | Big |galagabl.1_5
6 | 5E | Big |galagabl.1_6
7 | 4K | Big |galagabl.1_7
8 | R5 |Small|galagabl.1_8
9 | A7 |Small|galagabl.1_9
10 | A6 |Small|galagabl.1_a
[Apr/25/97]
Galaga by Namco (1981)
These images were actually from a pirate board but the game still has the
Namco copyright. I have christened the game "Galaga Green" to distinguish it
from the original and "Galag Blue" pirate boards. The pinout of this board is
the same as the original with the exception that the video signals are on the
edge connector and there is no separate video connector.
All images are 2732
[Jun/13/98]
GALAGA - NAMCO
The board is the same size 2-board set as the Bally version
except the chip placement is very different.
All proms are 2732
The game comes up with " Namco " after ram-rom checks
Uses three Z80 cpu's
The set 1-10 is a bootleg
Name Position
-----------------
GG1-1B 3P connector board
GG1-2B 3M "
GG1-3 2M "
GG1-4B 2L "
GG1-5B 3F "
GG1-7B 2C "
GG1-9 4L rear board
GG1-10 4F "
GG1-11 4D "
Other chips & board position
-----------------------------
07xx 5P conn bd
08xx 4L "
06xx 5J "
08xx 4D "
08xx 4C "
54xx 5A "
51xx 5F "
Z80 1P "
Z80 1A "
Z80 3A "
GG1-1 prom 1D "
GG1-2 prom 5C " (PROMCOMP.5N)
07xx 1N rear bd
00xx 1L "
04xx 1H "
05xx 4M "
02xx 4H "
GG1-3 prom 1C "
GG1-4 prom 2N "
GG1-5 prom 5N " (PROM-CKT.5N)
2128 ram 1K "
-
[Jan/03/2006]
Gallag
CPU
4x D780C-1 (main PCB)
1x oscillator 18.432MHz (main PCB)
ROMs
7x M5L2764K (1,2,3,4,6,9,10)
3x D2732D (5,7,8)
4x PROM TBP24S10N
1x PROM TBP18S030N
eprom 1-7 and prom 9c 8d are on main PCB
eprom 8-10 end prom 6a 6p 1r are on second PCB
Note
1x 18x2 edge connector (main PCB)
2x 8 switches dip (main PCB)
1x trimmer (volume)(main PCB)
PCB markings:
main "SG01-1"
second "SG02-1"
In vendita No
Dumped 02/01/2006
-
[Apr/24/2003]
Catsbee (Galaga mod/bootleg)
This game runs on modified bootleg Galaga hardware (blue board with PCB numbers DG-09-02 and DG-07-02)
ROM8: is a 2764. pins 1, 26, 27, 28 tied together.
pin2 out of socket, has wire that is tied to pin 4 of a LS259 that sits on top of the main Z80
CPU located at 5B/6B
Z80: There are 2 logic chips sitting on top of it which are wired up to the Z80 and to each other.
Looks like this....
|-------------------|
| LS32 LS259 <
|-------------------|
Bend all the legs outwards.
Line up the LS259 so pin 16 is in line with Z80 pin 11
Line up the LS32 so pin 7 is in line with Z80 pin 29
Atach the 2 chips to the top of the Z80 with some glue
Connect like this....
LS32 pin 1 tied to Z80 pin 22
LS32 pin 2 tied to Z80 pin 19
LS32 pin 3,4 tied together
LS32 pin 5 tied to Z80 pin 4
LS32 pin 6 tied to pin 10 LS32
LS32 pin 7 tied to Z80 pin 29 (GND)
LS32 pin 8 tied to LS259 pin 14
LS32 pin 9 tied to Z80 pin 5
LS32 pins 11, 12, 13 have NC
LS32 pin 14 tied to Z80 pin 11 (+5V)
LS259 pin 1 tied to Z80 pin 30
LS259 pin 2 tied to Z80 pin 31
LS259 pin 3 tied to Z80 pin 32
LS259 pin 4 to ROM 8 (as above)
LS259 pins 5, 6, 7 have NC
LS259 pin 8 tied to Z80 pin 29 (GND)
LS259 pins 9, 10, 11, 12 have NC
LS259 pin 13 tied to Z80 pin 14
LS259 pin 15 tied to Z80 pin 26
LS259 pin 16 tied to Z80 pin 11
-
[MAME]
Galaga memory map (preliminary)
CPU #1:
0000-3fff ROM
CPU #2:
0000-1fff ROM
CPU #3:
0000-1fff ROM
ALL CPUS:
8000-83ff Video RAM
8400-87ff Color RAM
8b80-8bff sprite code/color
9380-93ff sprite position
9b80-9bff sprite control
8800-9fff RAM
read:
6800-6807 dip switches (only bits 0 and 1 are used - bit 0 is DSW1, bit 1 is DSW2)
dsw1:
bit 6-7 lives
bit 3-5 bonus
bit 0-2 coins per play
dsw2: (bootleg version, the original version is slightly different)
bit 7 cocktail/upright (1 = upright)
bit 6 ?
bit 5 RACK TEST
bit 4 pause (0 = paused, 1 = not paused)
bit 3 ?
bit 2 ?
bit 0-1 difficulty
7000- custom IO chip return values
7100 custom IO chip status ($10 = command executed)
write:
6805 sound voice 1 waveform (nibble)
6811-6813 sound voice 1 frequency (nibble)
6815 sound voice 1 volume (nibble)
680a sound voice 2 waveform (nibble)
6816-6818 sound voice 2 frequency (nibble)
681a sound voice 2 volume (nibble)
680f sound voice 3 waveform (nibble)
681b-681d sound voice 3 frequency (nibble)
681f sound voice 3 volume (nibble)
6820 cpu #1 irq acknowledge/enable
6821 cpu #2 irq acknowledge/enable
6822 cpu #3 nmi acknowledge/enable
6823 if 0, halt CPU #2 and #3
6830 Watchdog reset?
7000- custom IO chip parameters
7100 custom IO chip command (see machine/galaga.c for more details)
a000-a001 starfield scroll speed (only bit 0 is significant)
a002 starfield scroll direction (0 = backwards) (only bit 0 is significant)
a003-a004 starfield blink
a005 starfield enable
a007 flip screen
Interrupts:
CPU #1 IRQ mode 1
NMI is triggered by the custom IO chip to signal the CPU to read/write
parameters
CPU #2 IRQ mode 1
CPU #3 NMI (@120Hz)
-
|
| xevious | Xevious (Namco)[MAME]
Xevious
general map
-----------+---+-----------------+-------------------------
hex |r/w| D D D D D D D D |
location | | 7 6 5 4 3 2 1 0 | function
-----------+---+-----------------+-------------------------
0000-3FFF | R | D D D D D D D D | CPU 1 master rom (16k)
0000-1FFF | R | D D D D D D D D | CPU 2 motion rom (8k)
0000-0FFF | R | D D D D D D D D | CPU 3 sound rom (4k)
-----------+---+-----------------+-------------------------
6800-680F | W | - - - - D D D D | Audio control
6810-681F | W | - - - - D D D D | Audio control
-----------+---+-----------------+-------------------------
6820 | W | - - - - - - - D | 0 = Reset IRQ1(latched)
6821 | W | - - - - - - - D | 0 = Reset IRQ2(latched)
6822 | W | - - - - - - - D | 0 = Reset NMI3(latched)
6823 | W | - - - - - - - D | 0 = Reset #2,#3 CPU
-----------+---+-----------------+-------------------------
6830 | W | | watchdog reset
-----------+---+-----------------+-------------------------
7000 |R/W| D D D D D D D D | custom 06 Data
7100 |R/W| D D D D D D D D | custom 06 Command
7??? CPU #1 NMI REQUEST
-----------+---+-----------------+-------------------------
7800-7FFF |R/W| D D D D D D D D | 2k work ram
-----------+---+-----------------+-------------------------
8000-87FF |R/W| D D D D D D D D | 2k playfeild RAM
-----------+---+-----------------+-------------------------
8000-877F |R/W| D D D D D D D D | RAM
8780-87FF |R/W| D D D D D D D D | 2k sprite RAM (X-POS)
9000-977F |R/W| D D D D D D D D | RAM
9780-97FF |R/W| D D D D D D D D | 2k sprite RAM (HSIZE,MODE ??)
A000-A77F |R/W| D D D D D D D D | RAM
A780-A7FF |R/W| D D D D D D D D | 2k sprite RAM (PIC)
-----------+---+-----------------+-------------------------
B000-BFFF |R/W| D D D D D D D D | 4k playfeild RAM ( ATTRIB)
C000-CFFF |R/W| D D D D D D D D | 4k playfeild RAM ( PIC )
-----------+---+-----------------+-------------------------
D000-D00F | W | D D D D D D D D | A0->D8:background Y scroll position
D010-D01F | W | D D D D D D D D | A0->D8:font Y scroll position ??
D020-D02F | W | D D D D D D D D | A0->D8:background X scroll position ??
D030-D03F | W | D D D D D D D D | A0->D8:font X scroll position ?
D070-D07F | W | D | display flip mode ?
-----------+---+-----------------+-------------------------
F000 | W | D D D D D D D D | planet map position low ?
F001 | W | D D D D D D D D | planet map position high ?
F000 | R | D D D D D D D D | planet map data low ?
F001 | R | D D D D D D D D | planet map data high ?
-----------+---+-----------------+-------------------------
Xevious memory map (preliminary)
Z80-1:MASTER CPU
0000H-3FFFH R P-ROM
4000H-FFFFH R/W shared area
Z80-2:MOTION CUP
0000H-1FFFH R P-ROM
4000H-FFFFH R/W shared area
Z80-3:SOUND CPU
0000H-1FFFH R P-ROM
4000H-FFFFH R/W shared area
shared area.
6800H-6807H R DIP SWITCH READ
A0-2 : bit select(6800H=bit0 , 6801=bit1,6807=bit7)
D0 : DIP SW.A bit read
D1 : DIP SW.B bit read
DIP SW.A
Bit0 = BLASTER SWITCH
6800H-680FH R shadow(6800H-6807H)
6800H-681FH W Sound RAM0 (same to DIGDUG ?)
D0-3:data
6810H-681FH W Sound RAM1
D0-3:data
6820H W MASTER-INTERRUPT CLEAR & ENABLE
D0 = 0:CLEAR & DISABLE / 1:ENABLE
6821H W MOTION-INTERRUPT CLEAR & ENABLE
D0 = 0:CLEAR & DISABLE / 1:ENABLE
6822H W SOUND -NMI CONTROLL
D0 = 0:NMI ON / 1:NMI OFF
6823H W CPU 2,3 RESET CONTROLL
D0 = 0:RESET
6830H-683F W WDR Watch dock timer clear
6840H-6FFFH R/W shadow(6800H-603FH)
7000H R custom-io data read ( after CPU #1 NMI )
7000H W custom-io data write( after CPU #1 NMI )
7100H R custom-io timming port
bit7 :1=busy ?
bit6 :1=busy ?
bit5 :1=busy ?
7100H W custom-io command write
7???H W sound ganarator (controll by custom_ic ?)
7800H-7FFFH R/W S-RAM
8000H-87FFh R/W ram ( master cpu )
8780H-87FFH R/W sprite X position ( 80-bf:used by master,c0-ff:used by motion)
A0=0:sprite Y position (OFF = 0xef )
A0=1:sprite X position
8800H-8FFFH R/W shadow(8000H-87FFH)
9000H-97FFH R/W ram ( motion cpu )
9780H-97FFH R/W sprite attribute
A0=0:attribute Y
bit0 :HSIZE :sprite Y size ?
bit1 :HUNDZ :?
bit2 :FLOP :Y flip
bit3 :HUKAIRS:?
bit4-6:MD4-6 :?
bit7 :BIT3 :select sprite set (0=4M,4P,4R 3bit:1=4N 2bit )
A0=0:attribute X
bit0 :HSIZE :sprite X size ?
bit1 :HUNDZ :?
bit2 :FLOP :X flip
bit3 :HUKAIRS:?
bit4-6:MD4-6 :?
bit7 :BIT3 :?
9800H-9FFFH R/W shadow(9000H-97FFH)
A000H-A7FFH R/W ram ( sound cpu , master cpu )
A780H-a7FFH R/W sprite character nnumber
A0=0 character pattern name
A0=1 color map select
A800H-AFFFH R/W shadow(A000H-A7FFH)
B000H-BFFFH R/W background attrivute ( have 2 scroll planes ? )
D0-D1:COL0,1 palette set ?
D1-D5:ANI0-3 color code ?( font,bg use )
D6 :ANF X flip
D7 :PFF Y flip
C000H-CFFFH R/W background character ( have 2 scroll planes ? )
D000H-D07FH W CRTC access? (custom-13)
D???H W display flip select (TABLE 1P/2P mode)
bit0 :FLIP
F000H W BS0 xevious planet map select low ?
F001H W BB1 xeviosu planet map select high ?
F000H R BB0 xevious planet map get low ?
F001H R BS1 xevious planet map get high ?
F002-FFFFH shodow(F000H-F001H)
3)schematic diagram block.
Sheet 4A : main cpu , address decoder(4000h-7fffh) , sram
Sheet 4B : motion cpu
Sheet 5A : sound cpu
Sheet 5B : clock generator , 'digdug' sound , irq controller
Sheet 6A : joystick read , dip switch , audio(TONE?) , NMI to master cpu
Sheet 6B : address decoder (8000h-ffffh) , sprite ram r/w , disp. flip latch
Sheet 7A : sprite drawing engine
Sheet 7B : background ram , CRTC ?,graphic drawing engene ?
Sheet 8A : background(&font) drawing engene
Sheet 8B : display line buffer ?
Sheet 9A : video dac ( palette rom )
Sheet 9B : xevious planet map rom ?
P-ROMS in schematic
1M master cpu rom 0000H-1FFFH
1L master cpu rom 2000H-3FFFH
4C motion cpu rom 0000H-1FFFH
2C sound cpu rom 0000H-1FFFH
8M sound pcm rom ?
6M sound pcm decode rom ?
4M spright pattern low (BIT3=0,000-127)
4P spright pattern low (BIT3=0,128-255)
4R spright pattern high(BIT3=0)
D0-3:000-127
D4-7:128-255
4N spright pattern (BIT3=1)
3L spright color map table
3M spright color map table
3D background pattern bit0
3C background pattern bit1
3B background font pattern
4H background color map table
4F background color map table
6E palette rom blue
6D palette rom green
6A palette rom red
2A xevious planet map table ??
2B xevious planet map table ??
2C xevious planet map table ??
S-RAMS in schematic
1H sram 7800H-7FFFH
7L sound sram0 6800H-680FH
7K sound sram1 6810H-681FH
2S spright line 8000H-87FFH
2A spright att 9000H-97FFH
2P spright chr A000H-A7FFH
2J background ram B000H-B7FFH
2H background ram B800H-BFFFH
2F background ram C000H-C7FFH
2E background ram C800H-CFFFH
5N,5M sprite display line buffer ? (even disp,odd draw)
6N,6M sprite display line buffer ? (even draw,odd disp)
-
[Sep/04/2001]
BATTLES
These ROM Images are for the Bttles PCB.
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filemane device checksum (rename)
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|
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